2022-11-23 10:52:14

by Rahul Tanwar

Subject: [PATCH v4 4/4] x86/of: Add support for boot time interrupt delivery mode configuration

Presently, init/boot time interrupt delivery mode is enumerated
only for ACPI enabled systems by parsing MADT table or for older
systems by parsing MP table. But for OF based x86 systems, it is
assumed & hardcoded to legacy PIC mode. This causes boot time crash
for platforms which do not use 8259 compliant legacy PIC.

Add support for configuration of init time interrupt delivery mode
for x86 OF based systems by introducing a new optional boolean
property 'intel,virtual-wire-mode' for interrupt-controller node
of local APIC. This property emulates IMCRP Bit 7 of MP feature
info byte 2 of MP floating pointer structure.

Defaults to legacy PIC mode if absent. Configures it to virtual
wire compatibility mode if present.

Signed-off-by: Rahul Tanwar <[email protected]>
---
arch/x86/kernel/devicetree.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c
index fcc6f1b7818f..458e43490414 100644
--- a/arch/x86/kernel/devicetree.c
+++ b/arch/x86/kernel/devicetree.c
@@ -167,7 +167,14 @@ static void __init dtb_lapic_setup(void)
return;
}
smp_found_config = 1;
- pic_mode = 1;
+ if (of_property_read_bool(dn, "intel,virtual-wire-mode")) {
+ pr_info("Virtual Wire compatibility mode.\n");
+ pic_mode = 0;
+ } else {
+ pr_info("IMCR and PIC compatibility mode.\n");
+ pic_mode = 1;
+ }
+
register_lapic_address(lapic_addr);
}

--
2.17.1

2022-11-23 14:22:17

by Andy Shevchenko

Subject: Re: [PATCH v4 4/4] x86/of: Add support for boot time interrupt delivery mode configuration

On Wed, Nov 23, 2022 at 06:08:50PM +0800, Rahul Tanwar wrote:
> Presently, init/boot time interrupt delivery mode is enumerated
> only for ACPI enabled systems by parsing MADT table or for older
> systems by parsing MP table. But for OF based x86 systems, it is
> assumed & hardcoded to legacy PIC mode. This causes boot time crash
> for platforms which do not use 8259 compliant legacy PIC.
>
> Add support for configuration of init time interrupt delivery mode
> for x86 OF based systems by introducing a new optional boolean
> property 'intel,virtual-wire-mode' for interrupt-controller node
> of local APIC. This property emulates IMCRP Bit 7 of MP feature
> info byte 2 of MP floating pointer structure.
>
> Defaults to legacy PIC mode if absent. Configures it to virtual
> wire compatibility mode if present.

From code perspective looks good to me, but you need to have a blessing by DT
people for first two patches.

With whatever property name agreed on,
Reviewed-by: Andy Shevchenko <[email protected]>

> Signed-off-by: Rahul Tanwar <[email protected]>
> ---
> arch/x86/kernel/devicetree.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c
> index fcc6f1b7818f..458e43490414 100644
> --- a/arch/x86/kernel/devicetree.c
> +++ b/arch/x86/kernel/devicetree.c
> @@ -167,7 +167,14 @@ static void __init dtb_lapic_setup(void)
> return;
> }
> smp_found_config = 1;
> - pic_mode = 1;
> + if (of_property_read_bool(dn, "intel,virtual-wire-mode")) {
> + pr_info("Virtual Wire compatibility mode.\n");
> + pic_mode = 0;
> + } else {
> + pr_info("IMCR and PIC compatibility mode.\n");
> + pic_mode = 1;
> + }
> +
> register_lapic_address(lapic_addr);
> }
>
> --
> 2.17.1
>

--
With Best Regards,
Andy Shevchenko