2022-11-26 12:43:12

by Zhen Lei

Subject: [PATCH v4 0/2] ARM: Make the dumped instructions are consistent with the disassembled ones

v3 --> v4:
1. The sparse warnings that are not involved in the modification are
not eliminated.
2. Eliminate the sparse warnings involved in the modification when
refactor dump_instr(), no longer use a separate patch.

v2 --> v3:
1. Don't use '__force to' cleanup the sparse warnings
2. Refactor dump_instr()
3. Relace cpu_to_le{32|16}() with __mem_to_opcode_{arm|thumb16}()


v1 --> v2:
1. Cleanup sparse warnings.

Zhen Lei (2):
ARM: Refactor dump_instr()
ARM: Make the dumped instructions are consistent with the disassembled
ones

arch/arm/kernel/traps.c | 25 ++++++++++++++-----------
1 file changed, 14 insertions(+), 11 deletions(-)

--
2.25.1

2022-11-26 13:00:37

by Zhen Lei

Subject: [PATCH v4 2/2] ARM: Make the dumped instructions are consistent with the disassembled ones

In ARM, the mapping of instruction memory is always little-endian, except
some BE-32 supported ARM architectures. Such as ARMv7-R, its instruction
endianness may be BE-32. Of course, its data endianness will also be BE-32
mode. Due to two negatives make a positive, the instruction stored in the
register after reading is in little-endian format. But for the case of
BE-8, the instruction endianness is LE, the instruction stored in the
register after reading is in big-endian format, which is inconsistent
with the disassembled one.

For example:
The content of disassembly:
c0429ee8: e3500000 cmp r0, #0
c0429eec: 159f2044 ldrne r2, [pc, #68]
c0429ef0: 108f2002 addne r2, pc, r2
c0429ef4: 1882000a stmne r2, {r1, r3}
c0429ef8: e7f000f0 udf #0

The output of undefined instruction exception:
Internal error: Oops - undefined instruction: 0 [#1] SMP ARM
... ...
Code: 000050e3 44209f15 02208f10 0a008218 (f000f0e7)

This inconveniences the checking of instructions. What's worse is that,
for somebody who don't know about this, might think the instructions are
all broken.

So, when CONFIG_CPU_ENDIAN_BE8=y, let's convert the instructions to
little-endian format before they are printed. The conversion result is
as follows:
Code: e3500000 159f2044 108f2002 1882000a (e7f000f0)

Signed-off-by: Zhen Lei <[email protected]>
---
arch/arm/kernel/traps.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index a92e0763739584e..40c7c807d67f4ed 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -186,12 +186,14 @@ static void dump_instr(const char *lvl, struct pt_regs *regs)
else
bad = get_kernel_nofault(tmp, &((u16 *)addr)[i]);

- val = tmp;
+ val = __mem_to_opcode_thumb16(tmp);
} else {
if (user_mode(regs))
bad = get_user(val, &((u32 __user *)addr)[i]);
else
bad = get_kernel_nofault(val, &((u32 *)addr)[i]);
+
+ val = __mem_to_opcode_arm(val);
}

if (!bad)
--
2.25.1

2022-11-28 11:26:39

by Russell King (Oracle)

Subject: Re: [PATCH v4 0/2] ARM: Make the dumped instructions are consistent with the disassembled ones

On Sat, Nov 26, 2022 at 08:21:35PM +0800, Zhen Lei wrote:
> v3 --> v4:
> 1. The sparse warnings that are not involved in the modification are
> not eliminated.
> 2. Eliminate the sparse warnings involved in the modification when
> refactor dump_instr(), no longer use a separate patch.
>
> v2 --> v3:
> 1. Don't use '__force to' cleanup the sparse warnings
> 2. Refactor dump_instr()
> 3. Relace cpu_to_le{32|16}() with __mem_to_opcode_{arm|thumb16}()
>
>
> v1 --> v2:
> 1. Cleanup sparse warnings.
>
> Zhen Lei (2):
> ARM: Refactor dump_instr()
> ARM: Make the dumped instructions are consistent with the disassembled
> ones

Looks good now, thanks.

Please put it in my patch system, details in my signature. Thanks.

--
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