In the latest JEDEC standard (JESD216F), there are now bitfields in the
4 byte address instruction table for 1S-1S-8S and 1S-8S-8S modes
This patchset adds support for checking the 4BAIT for these modes,
along with additional NO_SFDP_FLAGS to support enabling these new modes
Nathan Barrett-Morrison (3):
mtd: spi-nor: Extend SFDP 4byte address instruction lookup table with
new octal modes as per JEDEC JESD216F
mtd: spi-nor: Add additional octal-mode flags to be checked during
SFDP
mtd: spi-nor: Add support for IS25LX256 operating in 1S-1S-8S mode
drivers/mtd/spi-nor/core.c | 21 ++++++++++++++++++++-
drivers/mtd/spi-nor/core.h | 9 ++++++---
drivers/mtd/spi-nor/issi.c | 3 +++
drivers/mtd/spi-nor/sfdp.c | 5 +++++
4 files changed, 34 insertions(+), 4 deletions(-)
--
2.30.2
This adds the IS25LX256 chip into the ISSI flash_info parts table
Signed-off-by: Nathan Barrett-Morrison <[email protected]>
---
drivers/mtd/spi-nor/issi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c
index 89a66a19d754..b4412a9afc4e 100644
--- a/drivers/mtd/spi-nor/issi.c
+++ b/drivers/mtd/spi-nor/issi.c
@@ -74,6 +74,9 @@ static const struct flash_info issi_nor_parts[] = {
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
.fixups = &is25lp256_fixups },
+ { "is25lx256", INFO(0x9d5a19, 0, 128 * 1024, 256)
+ NO_SFDP_FLAGS(SECT_4K | SPI_NOR_4B_OPCODES |
+ SPI_NOR_OCTAL_PP | SPI_NOR_OCTAL_READ) },
/* PMC */
{ "pm25lv512", INFO(0, 0, 32 * 1024, 2)
--
2.30.2