This series introduces dt-bindings documents for miscellaneous register
blocks implemented in Socionext UniPhier SoCs.
These are previously defined in the devicetree and used in the examples
of subnodes' dt-bindings, however, not documented.
These include two types of the blocks
* independent block including miscellaneous registers and functions for
the whole SoC (system controller and SoC-glue logic)
* sideband logic including control registers in the component (others)
And prior to adding these dt-bindings, fix examples in the existing
dt-bindings.
This series is part of the previous series shown below:
https://lore.kernel.org/linux-arm-kernel/[email protected]
Changes since v1:
- Fix examples in the existing dt-bindings (Add PATCH 1-7)
- Add dt-bindings for SoC-glue logic debug part (Add PATCH 10)
- Drop generic and ld6b compatible strings
- Change "usb-controller" node in soc-glue to "usb-hub"
- Change "usb-controller" node in USB glue layer example to "usb"
- Add negation of child properties by compatible string
Kunihiko Hayashi (16):
dt-bindings: clock: Fix node descriptions in uniphier-clock example
dt-bindings: reset: Fix node descriptions in uniphier-reset example
dt-bindings: pinctrl: Fix node descriptions in uniphier-pinctrl
example
dt-bindings: watchdog: Fix node descriptions in uniphier-wdt example
dt-bindings: thermal: Fix node descriptions in uniphier-thermal
example
dt-bindings: phy: Fix node descriptions in uniphier-phy example
dt-bindings: nvmem: Fix node descriptions in uniphier-efuse example
dt-bindings: soc: socionext: Add UniPhier system controller
dt-bindings: soc: socionext: Add UniPhier SoC-glue logic
dt-bindings: soc: socionext: Add UniPhier SoC-glue logic debug part
dt-bindings: soc: socionext: Add UniPhier peripheral block
dt-bindings: soc: socionext: Add UniPhier media I/O block
dt-bindings: soc: socionext: Add UniPhier SD interface block
dt-bindings: soc: socionext: Add UniPhier ADAMV block
dt-bindings: soc: socionext: Add UniPhier DWC3 USB glue layer
dt-bindings: soc: socionext: Add UniPhier AHCI glue layer
.../clock/socionext,uniphier-clock.yaml | 21 ++--
.../nvmem/socionext,uniphier-efuse.yaml | 6 +-
.../phy/socionext,uniphier-ahci-phy.yaml | 1 +
.../phy/socionext,uniphier-usb2-phy.yaml | 4 +-
.../phy/socionext,uniphier-usb3hs-phy.yaml | 5 +-
.../phy/socionext,uniphier-usb3ss-phy.yaml | 5 +-
.../pinctrl/socionext,uniphier-pinctrl.yaml | 2 +-
.../reset/socionext,uniphier-glue-reset.yaml | 7 +-
.../reset/socionext,uniphier-reset.yaml | 28 +++--
.../socionext/socionext,uniphier-adamv.yaml | 51 ++++++++
.../socionext,uniphier-ahci-glue.yaml | 78 ++++++++++++
.../socionext,uniphier-dwc3-glue.yaml | 106 ++++++++++++++++
.../socionext/socionext,uniphier-mioctrl.yaml | 66 ++++++++++
.../socionext,uniphier-perictrl.yaml | 65 ++++++++++
.../socionext/socionext,uniphier-sdctrl.yaml | 62 ++++++++++
.../socionext,uniphier-soc-glue-debug.yaml | 73 +++++++++++
.../socionext,uniphier-soc-glue.yaml | 113 ++++++++++++++++++
.../socionext/socionext,uniphier-sysctrl.yaml | 105 ++++++++++++++++
.../thermal/socionext,uniphier-thermal.yaml | 4 +-
.../watchdog/socionext,uniphier-wdt.yaml | 2 +-
MAINTAINERS | 1 +
21 files changed, 769 insertions(+), 36 deletions(-)
create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml
create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml
create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml
create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml
create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml
create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml
create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml
create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml
create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
--
2.25.1
Add devicetree binding schema for the system controller implemented on
Socionext Uniphier SoCs.
This system controller has multiple functions such as clock control,
reset control, internal watchdog timer, thermal management, and so on.
Signed-off-by: Kunihiko Hayashi <[email protected]>
---
.../socionext/socionext,uniphier-sysctrl.yaml | 105 ++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 106 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
new file mode 100644
index 000000000000..c1b7cec8def4
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
@@ -0,0 +1,105 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sysctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Socionext UniPhier system controller
+
+maintainers:
+ - Kunihiko Hayashi <[email protected]>
+
+description: |+
+ System controller implemented on Socionext UniPhier SoCs has multiple
+ functions such as clock control, reset control, internal watchdog timer,
+ thermal management, and so on.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - socionext,uniphier-ld4-sysctrl
+ - socionext,uniphier-pro4-sysctrl
+ - socionext,uniphier-pro5-sysctrl
+ - socionext,uniphier-pxs2-sysctrl
+ - socionext,uniphier-sld8-sysctrl
+ - socionext,uniphier-ld11-sysctrl
+ - socionext,uniphier-ld20-sysctrl
+ - socionext,uniphier-pxs3-sysctrl
+ - socionext,uniphier-nx1-sysctrl
+ - const: simple-mfd
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+patternProperties:
+ "^clock-controller(@[0-9a-f]+)?$":
+ $ref: /schemas/clock/socionext,uniphier-clock.yaml#
+
+ "^reset-controller(@[0-9a-f]+)?$":
+ $ref: /schemas/reset/socionext,uniphier-reset.yaml#
+
+ "^watchdog(@[0-9a-f]+)?$":
+ $ref: /schemas/watchdog/socionext,uniphier-wdt.yaml#
+
+ "^thermal-sensor(@[0-9a-f]+)?$":
+ $ref: /schemas/thermal/socionext,uniphier-thermal.yaml#
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: socionext,uniphier-ld4-sysctrl
+ then:
+ patternProperties:
+ "^watchdog(@[0-9a-f]+)?$": false
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - socionext,uniphier-ld4-sysctrl
+ - socionext,uniphier-pro4-sysctrl
+ - socionext,uniphier-sld8-sysctrl
+ - socionext,uniphier-ld11-sysctrl
+ then:
+ patternProperties:
+ "^thermal-sensor(@[0-9a-f]+)?$": false
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ syscon@61840000 {
+ compatible = "socionext,uniphier-ld20-sysctrl",
+ "simple-mfd", "syscon";
+ reg = <0x61840000 0x4000>;
+
+ clock-controller {
+ compatible = "socionext,uniphier-ld20-clock";
+ #clock-cells = <1>;
+ };
+
+ reset-controller {
+ compatible = "socionext,uniphier-ld20-reset";
+ #reset-cells = <1>;
+ };
+
+ watchdog {
+ compatible = "socionext,uniphier-wdt";
+ };
+
+ thermal-sensor {
+ compatible = "socionext,uniphier-ld20-thermal";
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ #thermal-sensor-cells = <0>;
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 0d8faba73fe8..8cec8ea46dd1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3103,6 +3103,7 @@ S: Maintained
F: Documentation/devicetree/bindings/arm/socionext/uniphier.yaml
F: Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml
F: Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml
+F: Documentation/devicetree/bindings/soc/socionext/socionext,uniphier*.yaml
F: arch/arm/boot/dts/uniphier*
F: arch/arm/include/asm/hardware/cache-uniphier.h
F: arch/arm/mach-uniphier/
--
2.25.1
Prior to adding dt-bindings for SoC-dependent controllers, rename the
thermal node and its parent node to the generic names in the example.
Signed-off-by: Kunihiko Hayashi <[email protected]>
---
.../bindings/thermal/socionext,uniphier-thermal.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml b/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml
index c5b25ce44956..dcc02f86ac5a 100644
--- a/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml
+++ b/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml
@@ -46,12 +46,12 @@ examples:
- |
// The UniPhier thermal should be a subnode of a "syscon" compatible node.
- sysctrl@61840000 {
+ syscon@61840000 {
compatible = "socionext,uniphier-ld20-sysctrl",
"simple-mfd", "syscon";
reg = <0x61840000 0x10000>;
- pvtctl: thermal {
+ pvtctl: thermal-sensor {
compatible = "socionext,uniphier-ld20-thermal";
interrupts = <0 3 1>;
#thermal-sensor-cells = <0>;
--
2.25.1
Add devicetree binding schema for the SD interface block implemented on
Socionext Uniphier SoCs.
This SD interface block is attached outside SDHC, and has some SD related
functions such as clock control, reset control, mode switch, and so on.
Signed-off-by: Kunihiko Hayashi <[email protected]>
---
.../socionext/socionext,uniphier-sdctrl.yaml | 62 +++++++++++++++++++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml
diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml
new file mode 100644
index 000000000000..af73f7f3f8d7
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sdctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Socionext UniPhier SD interface logic
+
+maintainers:
+ - Kunihiko Hayashi <[email protected]>
+
+description: |+
+ SD interface logic implemented on Socionext UniPhier SoCs is
+ attached outside SDHC, and has some SD related functions such as
+ clock control, reset control, mode switch, and so on.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - socionext,uniphier-pro5-sdctrl
+ - socionext,uniphier-pxs2-sdctrl
+ - socionext,uniphier-ld11-sdctrl
+ - socionext,uniphier-ld20-sdctrl
+ - socionext,uniphier-pxs3-sdctrl
+ - socionext,uniphier-nx1-sdctrl
+ - const: simple-mfd
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+patternProperties:
+ "^clock-controller(@[0-9a-f]+)?$":
+ $ref: /schemas/clock/socionext,uniphier-clock.yaml#
+
+ "^reset-controller(@[0-9a-f]+)?$":
+ $ref: /schemas/reset/socionext,uniphier-reset.yaml#
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ syscon@59810000 {
+ compatible = "socionext,uniphier-ld20-sdctrl",
+ "simple-mfd", "syscon";
+ reg = <0x59810000 0x400>;
+
+ clock-controller {
+ compatible = "socionext,uniphier-ld20-sd-clock";
+ #clock-cells = <1>;
+ };
+
+ reset-controller {
+ compatible = "socionext,uniphier-ld20-sd-reset";
+ #reset-cells = <1>;
+ };
+ };
--
2.25.1
Add DT binding schema for components belonging to the platform-specific
AHCI glue layer implemented in UniPhier SoCs.
This AHCI glue layer works as a sideband logic for the host controller,
including core reset, PHYs, and some signals to the controller.
Signed-off-by: Kunihiko Hayashi <[email protected]>
---
.../socionext,uniphier-ahci-glue.yaml | 78 +++++++++++++++++++
1 file changed, 78 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml
diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml
new file mode 100644
index 000000000000..bf37be8a778d
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml
@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-ahci-glue.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Socionext UniPhier SoC AHCI glue layer
+
+maintainers:
+ - Kunihiko Hayashi <[email protected]>
+
+description: |+
+ AHCI glue layer implemented on Socionext UniPhier SoCs is a sideband
+ logic handling signals to AHCI host controller inside AHCI component.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - socionext,uniphier-pro4-ahci-glue
+ - socionext,uniphier-pxs2-ahci-glue
+ - socionext,uniphier-pxs3-ahci-glue
+ - const: simple-mfd
+
+ reg:
+ maxItems: 1
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 1
+
+ ranges: true
+
+patternProperties:
+ "^reset-controller@[0-9a-f]+$":
+ $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml#
+
+ "phy@[0-9a-f]+$":
+ $ref: /schemas/phy/socionext,uniphier-ahci-phy.yaml#
+
+required:
+ - compatible
+ - reg
+
+additionalProperties:
+ type: object
+
+examples:
+ - |
+ sata-controller@65700000 {
+ compatible = "socionext,uniphier-pxs3-ahci-glue", "simple-mfd";
+ reg = <0x65b00000 0x400>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x65700000 0x100>;
+
+ reset-controller@0 {
+ compatible = "socionext,uniphier-pxs3-ahci-reset";
+ reg = <0x0 0x4>;
+ clock-names = "link";
+ clocks = <&sys_clk 28>;
+ reset-names = "link";
+ resets = <&sys_rst 28>;
+ #reset-cells = <1>;
+ };
+
+ phy@10 {
+ compatible = "socionext,uniphier-pxs3-ahci-phy";
+ reg = <0x10 0x10>;
+ clock-names = "link", "phy";
+ clocks = <&sys_clk 28>, <&sys_clk 30>;
+ reset-names = "link", "phy";
+ resets = <&sys_rst 28>, <&sys_rst 30>;
+ #phy-cells = <0>;
+ };
+ };
--
2.25.1
On Wed, 07 Dec 2022 14:54:05 +0900, Kunihiko Hayashi wrote:
> Add DT binding schema for components belonging to the platform-specific
> AHCI glue layer implemented in UniPhier SoCs.
>
> This AHCI glue layer works as a sideband logic for the host controller,
> including core reset, PHYs, and some signals to the controller.
>
> Signed-off-by: Kunihiko Hayashi <[email protected]>
> ---
> .../socionext,uniphier-ahci-glue.yaml | 78 +++++++++++++++++++
> 1 file changed, 78 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.example.dtb: ahci-glue@65700000: 'reg' is a required property
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/[email protected]
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
On Wed, 07 Dec 2022 14:53:57 +0900, Kunihiko Hayashi wrote:
> Add devicetree binding schema for the system controller implemented on
> Socionext Uniphier SoCs.
>
> This system controller has multiple functions such as clock control,
> reset control, internal watchdog timer, thermal management, and so on.
>
> Signed-off-by: Kunihiko Hayashi <[email protected]>
> ---
> .../socionext/socionext,uniphier-sysctrl.yaml | 105 ++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 106 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.example.dtb: sysctrl@61840000: 'thermal' does not match any of the regexes: '^clock-controller(@[0-9a-f]+)?$', '^reset-controller(@[0-9a-f]+)?$', '^thermal-sensor(@[0-9a-f]+)?$', '^watchdog(@[0-9a-f]+)?$', 'pinctrl-[0-9]+'
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/[email protected]
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
On 2022/12/07 23:19, Rob Herring wrote:
>
> On Wed, 07 Dec 2022 14:53:57 +0900, Kunihiko Hayashi wrote:
>> Add devicetree binding schema for the system controller implemented on
>> Socionext Uniphier SoCs.
>>
>> This system controller has multiple functions such as clock control,
>> reset control, internal watchdog timer, thermal management, and so on.
>>
>> Signed-off-by: Kunihiko Hayashi <[email protected]>
>> ---
>> .../socionext/socionext,uniphier-sysctrl.yaml | 105 ++++++++++++++++++
>> MAINTAINERS | 1 +
>> 2 files changed, 106 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
>>
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.example.dtb:
> sysctrl@61840000: 'thermal' does not match any of the regexes:
> '^clock-controller(@[0-9a-f]+)?$', '^reset-controller(@[0-9a-f]+)?$',
> '^thermal-sensor(@[0-9a-f]+)?$', '^watchdog(@[0-9a-f]+)?$', 'pinctrl-[0-9]+'
> From schema:
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
>
> doc reference errors (make refcheckdocs):
>
> See
> https://patchwork.ozlabs.org/project/devicetree-bindings/patch/[email protected]
>
> The base for the series is generally the latest rc1. A different dependency
> should be noted in *this* patch.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit after running the above command yourself. Note
> that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> your schema. However, it must be unset to test all examples with your
> schema.
Already confirmed with example fixes.
This warning is a result evaluated before applying PATCH 5.
[05/16] dt-bindings: thermal: Fix node descriptions in uniphier-thermal example
Thank you,
---
Best Regards
Kunihiko Hayashi
On 07/12/2022 06:54, Kunihiko Hayashi wrote:
> Add DT binding schema for components belonging to the platform-specific
> AHCI glue layer implemented in UniPhier SoCs.
>
> This AHCI glue layer works as a sideband logic for the host controller,
> including core reset, PHYs, and some signals to the controller.
>
> Signed-off-by: Kunihiko Hayashi <[email protected]>
> ---
> .../socionext,uniphier-ahci-glue.yaml | 78 +++++++++++++++++++
> 1 file changed, 78 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml
>
> diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml
> new file mode 100644
> index 000000000000..bf37be8a778d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml
> @@ -0,0 +1,78 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-ahci-glue.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Socionext UniPhier SoC AHCI glue layer
> +
> +maintainers:
> + - Kunihiko Hayashi <[email protected]>
> +
> +description: |+
> + AHCI glue layer implemented on Socionext UniPhier SoCs is a sideband
> + logic handling signals to AHCI host controller inside AHCI component.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - socionext,uniphier-pro4-ahci-glue
> + - socionext,uniphier-pxs2-ahci-glue
> + - socionext,uniphier-pxs3-ahci-glue
> + - const: simple-mfd
> +
> + reg:
> + maxItems: 1
> +
> + '#address-cells':
use consistent quotes
> + const: 1
> +
> + '#size-cells':
> + const: 1
> +
> + ranges: true
> +
> +patternProperties:
> + "^reset-controller@[0-9a-f]+$":
> + $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml#
> +
> + "phy@[0-9a-f]+$":
> + $ref: /schemas/phy/socionext,uniphier-ahci-phy.yaml#
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties:
> + type: object
What is the additional object? It's not in your example, not in DTS. Why
do you need to allow it?
Best regards,
Krzysztof
On 07/12/2022 06:53, Kunihiko Hayashi wrote:
> Add devicetree binding schema for the system controller implemented on
> Socionext Uniphier SoCs.
>
> This system controller has multiple functions such as clock control,
> reset control, internal watchdog timer, thermal management, and so on.
>
> Signed-off-by: Kunihiko Hayashi <[email protected]>
> ---
> .../socionext/socionext,uniphier-sysctrl.yaml | 105 ++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 106 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
>
> diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
> new file mode 100644
> index 000000000000..c1b7cec8def4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
> @@ -0,0 +1,105 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sysctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Socionext UniPhier system controller
> +
> +maintainers:
> + - Kunihiko Hayashi <[email protected]>
> +
> +description: |+
> + System controller implemented on Socionext UniPhier SoCs has multiple
> + functions such as clock control, reset control, internal watchdog timer,
> + thermal management, and so on.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - socionext,uniphier-ld4-sysctrl
> + - socionext,uniphier-pro4-sysctrl
> + - socionext,uniphier-pro5-sysctrl
> + - socionext,uniphier-pxs2-sysctrl
> + - socionext,uniphier-sld8-sysctrl
> + - socionext,uniphier-ld11-sysctrl
> + - socionext,uniphier-ld20-sysctrl
> + - socionext,uniphier-pxs3-sysctrl
> + - socionext,uniphier-nx1-sysctrl
> + - const: simple-mfd
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> +patternProperties:
> + "^clock-controller(@[0-9a-f]+)?$":
I don't remember if we talked about this but: why do you include here
unit address? All your bindings expect these take regmap from the parent
and they do not have separate MMIO address space, so these should be
properties, not pattern properties.
Same in places below.
> + $ref: /schemas/clock/socionext,uniphier-clock.yaml#
> +
> + "^reset-controller(@[0-9a-f]+)?$":
> + $ref: /schemas/reset/socionext,uniphier-reset.yaml#
> +
> + "^watchdog(@[0-9a-f]+)?$":
> + $ref: /schemas/watchdog/socionext,uniphier-wdt.yaml#
> +
> + "^thermal-sensor(@[0-9a-f]+)?$":
> + $ref: /schemas/thermal/socionext,uniphier-thermal.yaml#
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: socionext,uniphier-ld4-sysctrl
> + then:
> + patternProperties:
> + "^watchdog(@[0-9a-f]+)?$": false
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - socionext,uniphier-ld4-sysctrl
> + - socionext,uniphier-pro4-sysctrl
> + - socionext,uniphier-sld8-sysctrl
> + - socionext,uniphier-ld11-sysctrl
> + then:
> + patternProperties:
> + "^thermal-sensor(@[0-9a-f]+)?$": false
> +
> +additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> +
Best regards,
Krzysztof
On 2022/12/08 17:15, Krzysztof Kozlowski wrote:
> On 07/12/2022 06:53, Kunihiko Hayashi wrote:
>> Add devicetree binding schema for the system controller implemented on
>> Socionext Uniphier SoCs.
>>
>> This system controller has multiple functions such as clock control,
>> reset control, internal watchdog timer, thermal management, and so on.
>>
>> Signed-off-by: Kunihiko Hayashi <[email protected]>
>> ---
>> .../socionext/socionext,uniphier-sysctrl.yaml | 105 ++++++++++++++++++
>> MAINTAINERS | 1 +
>> 2 files changed, 106 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
>>
>> diff --git
>> a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
>> b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
>> new file mode 100644
>> index 000000000000..c1b7cec8def4
>> --- /dev/null
>> +++
>> b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml
>> @@ -0,0 +1,105 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id:
>> http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sysctrl.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Socionext UniPhier system controller
>> +
>> +maintainers:
>> + - Kunihiko Hayashi <[email protected]>
>> +
>> +description: |+
>> + System controller implemented on Socionext UniPhier SoCs has multiple
>> + functions such as clock control, reset control, internal watchdog
>> timer,
>> + thermal management, and so on.
>> +
>> +properties:
>> + compatible:
>> + items:
>> + - enum:
>> + - socionext,uniphier-ld4-sysctrl
>> + - socionext,uniphier-pro4-sysctrl
>> + - socionext,uniphier-pro5-sysctrl
>> + - socionext,uniphier-pxs2-sysctrl
>> + - socionext,uniphier-sld8-sysctrl
>> + - socionext,uniphier-ld11-sysctrl
>> + - socionext,uniphier-ld20-sysctrl
>> + - socionext,uniphier-pxs3-sysctrl
>> + - socionext,uniphier-nx1-sysctrl
>> + - const: simple-mfd
>> + - const: syscon
>> +
>> + reg:
>> + maxItems: 1
>> +
>> +patternProperties:
>> + "^clock-controller(@[0-9a-f]+)?$":
>
> I don't remember if we talked about this but: why do you include here
> unit address? All your bindings expect these take regmap from the parent
> and they do not have separate MMIO address space, so these should be
> properties, not pattern properties.
I thought this unit address was an option, however, there is no example
of the existing devicetree. It is no longer necessary.
> Same in places below.
>
>> + $ref: /schemas/clock/socionext,uniphier-clock.yaml#
>> +
>> + "^reset-controller(@[0-9a-f]+)?$":
>> + $ref: /schemas/reset/socionext,uniphier-reset.yaml#
>> +
>> + "^watchdog(@[0-9a-f]+)?$":
>> + $ref: /schemas/watchdog/socionext,uniphier-wdt.yaml#
>> +
>> + "^thermal-sensor(@[0-9a-f]+)?$":
>> + $ref: /schemas/thermal/socionext,uniphier-thermal.yaml#
I'll drop the address patterns.
Thank you,
---
Best Regards
Kunihiko Hayashi
On 2022/12/08 17:24, Krzysztof Kozlowski wrote:
> On 07/12/2022 06:54, Kunihiko Hayashi wrote:
>> Add DT binding schema for components belonging to the platform-specific
>> AHCI glue layer implemented in UniPhier SoCs.
>>
>> This AHCI glue layer works as a sideband logic for the host controller,
>> including core reset, PHYs, and some signals to the controller.
>>
>> Signed-off-by: Kunihiko Hayashi <[email protected]>
>> ---
>> .../socionext,uniphier-ahci-glue.yaml | 78 +++++++++++++++++++
>> 1 file changed, 78 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml
>>
>> diff --git
>> a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml
>> b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml
>> new file mode 100644
>> index 000000000000..bf37be8a778d
>> --- /dev/null
>> +++
>> b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml
>> @@ -0,0 +1,78 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id:
>> http://devicetree.org/schemas/soc/socionext/socionext,uniphier-ahci-glue.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Socionext UniPhier SoC AHCI glue layer
>> +
>> +maintainers:
>> + - Kunihiko Hayashi <[email protected]>
>> +
>> +description: |+
>> + AHCI glue layer implemented on Socionext UniPhier SoCs is a sideband
>> + logic handling signals to AHCI host controller inside AHCI component.
>> +
>> +properties:
>> + compatible:
>> + items:
>> + - enum:
>> + - socionext,uniphier-pro4-ahci-glue
>> + - socionext,uniphier-pxs2-ahci-glue
>> + - socionext,uniphier-pxs3-ahci-glue
>> + - const: simple-mfd
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + '#address-cells':
>
> use consistent quotes
I'll change it.
>> + const: 1
>> +
>> + '#size-cells':
>> + const: 1
>> +
>> + ranges: true
>> +
>> +patternProperties:
>> + "^reset-controller@[0-9a-f]+$":
>> + $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml#
>> +
>> + "phy@[0-9a-f]+$":
>> + $ref: /schemas/phy/socionext,uniphier-ahci-phy.yaml#
>> +
>> +required:
>> + - compatible
>> + - reg
>> +
>> +additionalProperties:
>> + type: object
>
> What is the additional object? It's not in your example, not in DTS. Why
> do you need to allow it?
Sorry, I forgot to drop it. I'll replace it with:
additionalProperties: false
Thank you,
---
Best Regards
Kunihiko Hayashi