LinuxLists.cc - [PATCH v2 3/3] thermal: qcom-spmi-temp-alarm: add support for LITE PMIC peripherals

2022-12-07 02:10:42

Subject: [PATCH v2 3/3] thermal: qcom-spmi-temp-alarm: add support for LITE PMIC peripherals

Add support for TEMP_ALARM LITE PMIC peripherals. This subtype
utilizes a pair of registers to configure a warning interrupt
threshold temperature and an automatic hardware shutdown
threshold temperature.

Signed-off-by: David Collins <[email protected]>
---
drivers/thermal/qcom/qcom-spmi-temp-alarm.c | 216 +++++++++++++++++++-
1 file changed, 207 insertions(+), 9 deletions(-)

diff --git a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
index a8b288de6b52..212e6e9865d5 100644
--- a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
+++ b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
@@ -24,21 +24,28 @@
#define QPNP_TM_REG_TYPE 0x04
#define QPNP_TM_REG_SUBTYPE 0x05
#define QPNP_TM_REG_STATUS 0x08
+#define QPNP_TM_REG_IRQ_STATUS 0x10
#define QPNP_TM_REG_SHUTDOWN_CTRL1 0x40
#define QPNP_TM_REG_ALARM_CTRL 0x46
/* TEMP_DAC_* registers are only present for TEMP_GEN2 v2.0 */
#define QPNP_TM_REG_TEMP_DAC_STG1 0x47
#define QPNP_TM_REG_TEMP_DAC_STG2 0x48
#define QPNP_TM_REG_TEMP_DAC_STG3 0x49
+#define QPNP_TM_REG_LITE_TEMP_CFG1 0x50
+#define QPNP_TM_REG_LITE_TEMP_CFG2 0x51

#define QPNP_TM_TYPE 0x09
#define QPNP_TM_SUBTYPE_GEN1 0x08
#define QPNP_TM_SUBTYPE_GEN2 0x09
+#define QPNP_TM_SUBTYPE_LITE 0xC0

#define STATUS_GEN1_STAGE_MASK GENMASK(1, 0)
#define STATUS_GEN2_STATE_MASK GENMASK(6, 4)
#define STATUS_GEN2_STATE_SHIFT 4

+/* IRQ status only needed for TEMP_ALARM_LITE */
+#define IRQ_STATUS_MASK BIT(0)
+
#define SHUTDOWN_CTRL1_OVERRIDE_S2 BIT(6)
#define SHUTDOWN_CTRL1_THRESHOLD_MASK GENMASK(1, 0)

@@ -46,6 +53,8 @@

#define ALARM_CTRL_FORCE_ENABLE BIT(7)

+#define LITE_TEMP_CFG_THRESHOLD_MASK GENMASK(3, 2)
+
#define THRESH_COUNT 4
#define STAGE_COUNT 3

@@ -90,6 +99,19 @@ static const long temp_dac_max[STAGE_COUNT] = {
119375, 159375, 159375
};

+/*
+ * TEMP_ALARM_LITE has two stages: warning and shutdown with independently
+ * configured threshold temperatures.
+ */
+
+static const long temp_map_lite_warning[THRESH_COUNT] = {
+ 115000, 125000, 135000, 145000
+};
+
+static const long temp_map_lite_shutdown[THRESH_COUNT] = {
+ 135000, 145000, 160000, 175000
+};
+
/* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
#define DEFAULT_TEMP 37000

@@ -146,7 +168,7 @@ static int qpnp_tm_write(struct qpnp_tm_chip *chip, u16 addr, u8 data)
*/
static long qpnp_tm_decode_temp(struct qpnp_tm_chip *chip, unsigned int stage)
{
- if (chip->has_temp_dac) {
+ if (chip->has_temp_dac || chip->subtype == QPNP_TM_SUBTYPE_LITE) {
if (stage == 0 || stage > STAGE_COUNT)
return 0;

@@ -164,19 +186,26 @@ static long qpnp_tm_decode_temp(struct qpnp_tm_chip *chip, unsigned int stage)
* qpnp_tm_get_temp_stage() - return over-temperature stage
* @chip: Pointer to the qpnp_tm chip
*
- * Return: stage (GEN1) or state (GEN2) on success, or errno on failure.
+ * Return: stage (GEN1), state (GEN2), or alarm interrupt state (LITE) on
+ * success; or errno on failure.
*/
static int qpnp_tm_get_temp_stage(struct qpnp_tm_chip *chip)
{
int ret;
+ u16 addr = QPNP_TM_REG_STATUS;
u8 reg = 0;

- ret = qpnp_tm_read(chip, QPNP_TM_REG_STATUS, &reg);
+ if (chip->subtype == QPNP_TM_SUBTYPE_LITE)
+ addr = QPNP_TM_REG_IRQ_STATUS;
+
+ ret = qpnp_tm_read(chip, addr, &reg);
if (ret < 0)
return ret;

if (chip->subtype == QPNP_TM_SUBTYPE_GEN1)
ret = reg & STATUS_GEN1_STAGE_MASK;
+ else if (chip->subtype == QPNP_TM_SUBTYPE_LITE)
+ ret = reg & IRQ_STATUS_MASK;
else
ret = (reg & STATUS_GEN2_STATE_MASK) >> STATUS_GEN2_STATE_SHIFT;

@@ -199,7 +228,8 @@ static int qpnp_tm_update_temp_no_adc(struct qpnp_tm_chip *chip)
return ret;
stage = ret;

- if (chip->subtype == QPNP_TM_SUBTYPE_GEN1) {
+ if (chip->subtype == QPNP_TM_SUBTYPE_GEN1
+ || chip->subtype == QPNP_TM_SUBTYPE_LITE) {
stage_new = stage;
stage_old = chip->stage;
} else {
@@ -282,6 +312,78 @@ static int qpnp_tm_set_temp_dac_thresh(struct qpnp_tm_chip *chip, int trip,
return 0;
}

+static int qpnp_tm_set_temp_lite_thresh(struct qpnp_tm_chip *chip, int trip,
+ int temp)
+{
+ int ret, temp_cfg, i;
+ const long *temp_map;
+ u16 addr;
+ u8 reg, thresh;
+
+ if (trip < 0 || trip >= STAGE_COUNT) {
+ dev_err(chip->dev, "invalid TEMP_LITE trip = %d\n", trip);
+ return -EINVAL;
+ }
+
+ switch (trip) {
+ case 0:
+ temp_map = temp_map_lite_warning;
+ addr = QPNP_TM_REG_LITE_TEMP_CFG1;
+ break;
+ case 1:
+ /*
+ * The second trip point is purely in software to facilitate
+ * a controlled shutdown after the warning threshold is crossed
+ * but before the automatic hardware shutdown threshold is
+ * crossed.
+ */
+ return 0;
+ case 2:
+ temp_map = temp_map_lite_shutdown;
+ addr = QPNP_TM_REG_LITE_TEMP_CFG2;
+ break;
+ default:
+ return 0;
+ }
+
+ if (temp < temp_map[THRESH_MIN] || temp > temp_map[THRESH_MAX]) {
+ dev_err(chip->dev, "invalid TEMP_LITE temp = %d\n", temp);
+ return -EINVAL;
+ }
+
+ thresh = 0;
+ temp_cfg = temp_map[thresh];
+ for (i = THRESH_MAX; i >= THRESH_MIN; i--) {
+ if (temp >= temp_map[i]) {
+ thresh = i;
+ temp_cfg = temp_map[i];
+ break;
+ }
+ }
+
+ if (temp_cfg == chip->temp_dac_map[trip])
+ return 0;
+
+ ret = qpnp_tm_read(chip, addr, &reg);
+ if (ret < 0) {
+ dev_err(chip->dev, "LITE_TEMP_CFG read failed, ret=%d\n", ret);
+ return ret;
+ }
+
+ reg &= ~LITE_TEMP_CFG_THRESHOLD_MASK;
+ reg |= FIELD_PREP(LITE_TEMP_CFG_THRESHOLD_MASK, thresh);
+
+ ret = qpnp_tm_write(chip, addr, reg);
+ if (ret < 0) {
+ dev_err(chip->dev, "LITE_TEMP_CFG write failed, ret=%d\n", ret);
+ return ret;
+ }
+
+ chip->temp_dac_map[trip] = temp_cfg;
+
+ return 0;
+}
+
static int qpnp_tm_update_critical_trip_temp(struct qpnp_tm_chip *chip,
int temp)
{
@@ -387,6 +489,24 @@ static const struct thermal_zone_device_ops qpnp_tm_sensor_temp_dac_ops = {
.set_trip_temp = qpnp_tm_set_temp_dac_trip_temp,
};

+static int qpnp_tm_set_temp_lite_trip_temp(struct thermal_zone_device *tz,
+ int trip, int temp)
+{
+ struct qpnp_tm_chip *chip = tz->devdata;
+ int ret;
+
+ mutex_lock(&chip->lock);
+ ret = qpnp_tm_set_temp_lite_thresh(chip, trip, temp);
+ mutex_unlock(&chip->lock);
+
+ return ret;
+}
+
+static const struct thermal_zone_device_ops qpnp_tm_sensor_temp_lite_ops = {
+ .get_temp = qpnp_tm_get_temp,
+ .set_trip_temp = qpnp_tm_set_temp_lite_trip_temp,
+};
+
static irqreturn_t qpnp_tm_isr(int irq, void *data)
{
struct qpnp_tm_chip *chip = data;
@@ -473,6 +593,71 @@ static int qpnp_tm_temp_dac_init(struct qpnp_tm_chip *chip)
return 0;
}

+/* Configure TEMP_LITE registers based on DT thermal_zone trips */
+static int qpnp_tm_temp_lite_update_trip_temps(struct qpnp_tm_chip *chip)
+{
+ const struct thermal_trip *trips;
+ int ret, ntrips, i;
+
+ ntrips = of_thermal_get_ntrips(chip->tz_dev);
+ /* Keep hardware defaults if no DT trips are defined. */
+ if (ntrips <= 0)
+ return 0;
+
+ trips = of_thermal_get_trip_points(chip->tz_dev);
+ if (!trips)
+ return -EINVAL;
+
+ for (i = 0; i < ntrips; i++) {
+ if (of_thermal_is_trip_valid(chip->tz_dev, i)) {
+ ret = qpnp_tm_set_temp_lite_thresh(chip, i,
+ trips[i].temperature);
+ if (ret < 0)
+ return ret;
+ }
+ }
+
+ /* Verify that trips are strictly increasing. */
+ if (chip->temp_dac_map[2] <= chip->temp_dac_map[0]) {
+ dev_err(chip->dev, "Threshold 2=%ld <= threshold 0=%ld\n",
+ chip->temp_dac_map[2], chip->temp_dac_map[0]);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+/* Read the hardware default TEMP_LITE stage threshold temperatures */
+static int qpnp_tm_temp_lite_init(struct qpnp_tm_chip *chip)
+{
+ int ret, thresh;
+ u8 reg = 0;
+
+ /*
+ * Store the warning trip temp in temp_dac_map[0] and the shutdown trip
+ * temp in temp_dac_map[2]. The second trip point is purely in software
+ * to facilitate a controlled shutdown after the warning threshold is
+ * crossed but before the automatic hardware shutdown threshold is
+ * crossed. Thus, there is no register to read for the second trip
+ * point.
+ */
+ ret = qpnp_tm_read(chip, QPNP_TM_REG_LITE_TEMP_CFG1, &reg);
+ if (ret < 0)
+ return ret;
+
+ thresh = FIELD_GET(LITE_TEMP_CFG_THRESHOLD_MASK, reg);
+ chip->temp_dac_map[0] = temp_map_lite_warning[thresh];
+
+ ret = qpnp_tm_read(chip, QPNP_TM_REG_LITE_TEMP_CFG2, &reg);
+ if (ret < 0)
+ return ret;
+
+ thresh = FIELD_GET(LITE_TEMP_CFG_THRESHOLD_MASK, reg);
+ chip->temp_dac_map[2] = temp_map_lite_shutdown[thresh];
+
+ return 0;
+}
+
/*
* This function initializes the internal temp value based on only the
* current thermal stage and threshold. Setup threshold control and
@@ -499,13 +684,18 @@ static int qpnp_tm_init(struct qpnp_tm_chip *chip)
goto out;
chip->stage = ret;

- stage = chip->subtype == QPNP_TM_SUBTYPE_GEN1
- ? chip->stage : alarm_state_map[chip->stage];
+ stage = (chip->subtype == QPNP_TM_SUBTYPE_GEN1
+ || chip->subtype == QPNP_TM_SUBTYPE_LITE)
+ ? chip->stage : alarm_state_map[chip->stage];

if (stage)
chip->temp = qpnp_tm_decode_temp(chip, stage);

- if (chip->has_temp_dac) {
+ if (chip->subtype == QPNP_TM_SUBTYPE_LITE) {
+ ret = qpnp_tm_temp_lite_update_trip_temps(chip);
+ if (ret < 0)
+ goto out;
+ } else if (chip->has_temp_dac) {
ret = qpnp_tm_temp_dac_update_trip_temps(chip);
if (ret < 0)
goto out;
@@ -597,7 +787,8 @@ static int qpnp_tm_probe(struct platform_device *pdev)
chip->dig_revision = (dig_major << 8) | dig_minor;

if (type != QPNP_TM_TYPE || (subtype != QPNP_TM_SUBTYPE_GEN1
- && subtype != QPNP_TM_SUBTYPE_GEN2)) {
+ && subtype != QPNP_TM_SUBTYPE_GEN2
+ && subtype != QPNP_TM_SUBTYPE_LITE)) {
dev_err(&pdev->dev, "invalid type 0x%02x or subtype 0x%02x\n",
type, subtype);
return -ENODEV;
@@ -609,7 +800,7 @@ static int qpnp_tm_probe(struct platform_device *pdev)
chip->has_temp_dac = true;
else if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major >= 1)
chip->temp_map = &temp_map_gen2_v1;
- else
+ else if (subtype == QPNP_TM_SUBTYPE_GEN1)
chip->temp_map = &temp_map_gen1;

if (chip->has_temp_dac) {
@@ -619,6 +810,13 @@ static int qpnp_tm_probe(struct platform_device *pdev)
return ret;
}

+ if (chip->subtype == QPNP_TM_SUBTYPE_LITE) {
+ ops = &qpnp_tm_sensor_temp_lite_ops;
+ ret = qpnp_tm_temp_lite_init(chip);
+ if (ret < 0)
+ return ret;
+ }
+
/*
* Register the sensor before initializing the hardware to be able to
* read the trip points. get_temp() returns the default temperature
--
2.25.1

2022-12-07 07:45:54

by kernel test robot

[permalink] [raw]

Subject: Re: [PATCH v2 3/3] thermal: qcom-spmi-temp-alarm: add support for LITE PMIC peripherals

Attachments:

(No filename) (4.86 kB)
config (329.74 kB)
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2022-12-07 15:32:36

by kernel test robot

[permalink] [raw]

Subject: Re: [PATCH v2 3/3] thermal: qcom-spmi-temp-alarm: add support for LITE PMIC peripherals

Hi David,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on rafael-pm/thermal]
[also build test ERROR on linus/master v6.1-rc8 next-20221207]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/David-Collins/thermal-qcom-spmi-temp-alarm-add-support-for-new-TEMP_ALARM-subtypes/20221207-100725
base: https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git thermal
patch link: https://lore.kernel.org/r/fa5b6b7a88b23f3efb15f4da4a2fdfa6e6d57cb2.1670375556.git.quic_collinsd%40quicinc.com
patch subject: [PATCH v2 3/3] thermal: qcom-spmi-temp-alarm: add support for LITE PMIC peripherals
config: hexagon-randconfig-r036-20221207
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project 6e4cea55f0d1104408b26ac574566a0e4de48036)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/e0a2cf4754a17500d98226eb7fa3e10822bd497b
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review David-Collins/thermal-qcom-spmi-temp-alarm-add-support-for-new-TEMP_ALARM-subtypes/20221207-100725
git checkout e0a2cf4754a17500d98226eb7fa3e10822bd497b
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=hexagon SHELL=/bin/bash drivers/thermal/qcom/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <[email protected]>

All errors (new ones prefixed by >>):

In file included from drivers/thermal/qcom/qcom-spmi-temp-alarm.c:11:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/hexagon/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/hexagon/include/asm/io.h:334:
include/asm-generic/io.h:547:31: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
val = __raw_readb(PCI_IOBASE + addr);
~~~~~~~~~~ ^
include/asm-generic/io.h:560:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr));
~~~~~~~~~~ ^
include/uapi/linux/byteorder/little_endian.h:37:51: note: expanded from macro '__le16_to_cpu'
#define __le16_to_cpu(x) ((__force __u16)(__le16)(x))
^
In file included from drivers/thermal/qcom/qcom-spmi-temp-alarm.c:11:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/hexagon/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/hexagon/include/asm/io.h:334:
include/asm-generic/io.h:573:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr));
~~~~~~~~~~ ^
include/uapi/linux/byteorder/little_endian.h:35:51: note: expanded from macro '__le32_to_cpu'
#define __le32_to_cpu(x) ((__force __u32)(__le32)(x))
^
In file included from drivers/thermal/qcom/qcom-spmi-temp-alarm.c:11:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/hexagon/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/hexagon/include/asm/io.h:334:
include/asm-generic/io.h:584:33: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
__raw_writeb(value, PCI_IOBASE + addr);
~~~~~~~~~~ ^
include/asm-generic/io.h:594:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
__raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr);
~~~~~~~~~~ ^
include/asm-generic/io.h:604:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
__raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr);
~~~~~~~~~~ ^
>> drivers/thermal/qcom/qcom-spmi-temp-alarm.c:374:9: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
reg |= FIELD_PREP(LITE_TEMP_CFG_THRESHOLD_MASK, thresh);
^
>> drivers/thermal/qcom/qcom-spmi-temp-alarm.c:648:11: error: call to undeclared function 'FIELD_GET'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
thresh = FIELD_GET(LITE_TEMP_CFG_THRESHOLD_MASK, reg);
^
6 warnings and 2 errors generated.

vim +/FIELD_PREP +374 drivers/thermal/qcom/qcom-spmi-temp-alarm.c

314
315 static int qpnp_tm_set_temp_lite_thresh(struct qpnp_tm_chip *chip, int trip,
316 int temp)
317 {
318 int ret, temp_cfg, i;
319 const long *temp_map;
320 u16 addr;
321 u8 reg, thresh;
322
323 if (trip < 0 || trip >= STAGE_COUNT) {
324 dev_err(chip->dev, "invalid TEMP_LITE trip = %d\n", trip);
325 return -EINVAL;
326 }
327
328 switch (trip) {
329 case 0:
330 temp_map = temp_map_lite_warning;
331 addr = QPNP_TM_REG_LITE_TEMP_CFG1;
332 break;
333 case 1:
334 /*
335 * The second trip point is purely in software to facilitate
336 * a controlled shutdown after the warning threshold is crossed
337 * but before the automatic hardware shutdown threshold is
338 * crossed.
339 */
340 return 0;
341 case 2:
342 temp_map = temp_map_lite_shutdown;
343 addr = QPNP_TM_REG_LITE_TEMP_CFG2;
344 break;
345 default:
346 return 0;
347 }
348
349 if (temp < temp_map[THRESH_MIN] || temp > temp_map[THRESH_MAX]) {
350 dev_err(chip->dev, "invalid TEMP_LITE temp = %d\n", temp);
351 return -EINVAL;
352 }
353
354 thresh = 0;
355 temp_cfg = temp_map[thresh];
356 for (i = THRESH_MAX; i >= THRESH_MIN; i--) {
357 if (temp >= temp_map[i]) {
358 thresh = i;
359 temp_cfg = temp_map[i];
360 break;
361 }
362 }
363
364 if (temp_cfg == chip->temp_dac_map[trip])
365 return 0;
366
367 ret = qpnp_tm_read(chip, addr, &reg);
368 if (ret < 0) {
369 dev_err(chip->dev, "LITE_TEMP_CFG read failed, ret=%d\n", ret);
370 return ret;
371 }
372
373 reg &= ~LITE_TEMP_CFG_THRESHOLD_MASK;
> 374 reg |= FIELD_PREP(LITE_TEMP_CFG_THRESHOLD_MASK, thresh);
375
376 ret = qpnp_tm_write(chip, addr, reg);
377 if (ret < 0) {
378 dev_err(chip->dev, "LITE_TEMP_CFG write failed, ret=%d\n", ret);
379 return ret;
380 }
381
382 chip->temp_dac_map[trip] = temp_cfg;
383
384 return 0;
385 }
386

--
0-DAY CI Kernel Test Service
https://01.org/lkp

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config (136.94 kB)
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