2022-12-12 15:19:14

by Shazad Hussain

[permalink] [raw]
Subject: [PATCH v3] arm64: dts: qcom: sa8540p-ride: enable pcie2a node

Add the pcie2a, pcie2a_phy, and respective tlmm
nodes that are needed to get pcie 2a controller
enabled on Qdrive3.

This patch enables 4GB 64bit memory space for
PCIE_2A to have BAR allocations of 64bit pref mem
needed on this Qdrive3 platform with dual SoCs
for root port and switch NT-EP. Hence this ranges
property is overridden in sa8540p-ride.dts only.

Signed-off-by: Shazad Hussain <[email protected]>
Reviewed-by: Brian Masney <[email protected]>
---
Changes since v2:
- Discard below patch as v3 is merged in qcom tree
[v4] arm64: dts: qcom: sa8540p-ride: enable PCIe support
https://lore.kernel.org/all/[email protected]/
- Move tlmm PINCTRL to the end and add R-b (Brian)

Changes since v1:
- Fix ranges property indentation (Konrad)

arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 96 +++++++++++++++++------
1 file changed, 71 insertions(+), 25 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
index 6c547f1b13dc..19b411175202 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
+++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
@@ -146,6 +146,27 @@ vreg_l8g: ldo8 {
};
};

+&pcie2a {
+ ranges = <0x01000000 0x0 0x3c200000 0x0 0x3c200000 0x0 0x100000>,
+ <0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>,
+ <0x03000000 0x5 0x00000000 0x5 0x00000000 0x1 0x00000000>;
+
+ perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 145 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2a_default>;
+
+ status = "okay";
+};
+
+&pcie2a_phy {
+ vdda-phy-supply = <&vreg_l11a>;
+ vdda-pll-supply = <&vreg_l3a>;
+
+ status = "okay";
+};
+
&pcie3a {
ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x20000000>,
@@ -186,31 +207,6 @@ &remoteproc_nsp1 {
status = "okay";
};

-&tlmm {
- pcie3a_default: pcie3a-default-state {
- perst-pins {
- pins = "gpio151";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- clkreq-pins {
- pins = "gpio150";
- function = "pcie3a_clkreq";
- drive-strength = <2>;
- bias-pull-up;
- };
-
- wake-pins {
- pins = "gpio56";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-up;
- };
- };
-};
-
&ufs_mem_hc {
reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;

@@ -268,3 +264,52 @@ &usb_2_qmpphy0 {
&xo_board_clk {
clock-frequency = <38400000>;
};
+
+/* PINCTRL */
+
+&tlmm {
+ pcie2a_default: pcie2a-default-state {
+ perst-pins {
+ pins = "gpio143";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ clkreq-pins {
+ pins = "gpio142";
+ function = "pcie2a_clkreq";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ wake-pins {
+ pins = "gpio145";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ pcie3a_default: pcie3a-default-state {
+ perst-pins {
+ pins = "gpio151";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ clkreq-pins {
+ pins = "gpio150";
+ function = "pcie3a_clkreq";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ wake-pins {
+ pins = "gpio56";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+};
--
2.38.0


2022-12-13 05:03:44

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH v3] arm64: dts: qcom: sa8540p-ride: enable pcie2a node

Hi Shazad,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on next-20221208]
[also build test ERROR on linus/master]
[cannot apply to robh/for-next v6.1 v6.1-rc8 v6.1-rc7 v6.1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/Shazad-Hussain/arm64-dts-qcom-sa8540p-ride-enable-pcie2a-node/20221212-230219
patch link: https://lore.kernel.org/r/20221212150045.4252-1-quic_shazhuss%40quicinc.com
patch subject: [PATCH v3] arm64: dts: qcom: sa8540p-ride: enable pcie2a node
config: arm64-allyesconfig
compiler: aarch64-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/25205a2dd1d7d7d12e910242088280d352f9e0d8
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Shazad-Hussain/arm64-dts-qcom-sa8540p-ride-enable-pcie2a-node/20221212-230219
git checkout 25205a2dd1d7d7d12e910242088280d352f9e0d8
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <[email protected]>

All errors (new ones prefixed by >>):

>> Error: arch/arm64/boot/dts/qcom/sa8540p-ride.dts:315.4-316.1 syntax error
FATAL ERROR: Unable to parse input tree

--
0-DAY CI Kernel Test Service
https://01.org/lkp


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