In preparation for adding the missing SPI and I2C nodes to
sc8280xp.dtsi, it was decided to rename all of the existing qupX_
uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
and rename qup2_uart17 to uart17. Note that some nodes are moved in the
file by this patch to preserve the expected sort order in the file.
Signed-off-by: Brian Masney <[email protected]>
Link: https://lore.kernel.org/lkml/[email protected]/
---
This is a new patch that's introduced in v2.
arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 12 ++++++------
arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 12 ++++++------
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 14 +++++++-------
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
4 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
index 84cb6f3eeb56..61f2e44e70c1 100644
--- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
+++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
@@ -17,7 +17,7 @@ / {
compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
aliases {
- serial0 = &qup2_uart17;
+ serial0 = &uart17;
};
chosen {
@@ -240,11 +240,6 @@ &qup2 {
status = "okay";
};
-&qup2_uart17 {
- compatible = "qcom,geni-debug-uart";
- status = "okay";
-};
-
&remoteproc_adsp {
firmware-name = "qcom/sa8540p/adsp.mbn";
status = "okay";
@@ -338,6 +333,11 @@ pm8450g_gpios: gpio@c000 {
};
};
+&uart17 {
+ compatible = "qcom,geni-debug-uart";
+ status = "okay";
+};
+
&ufs_mem_hc {
reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
index 21f3ff024910..b6e0db5508c7 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
+++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
@@ -17,7 +17,7 @@ / {
compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
aliases {
- serial0 = &qup2_uart17;
+ serial0 = &uart17;
};
chosen {
@@ -192,11 +192,6 @@ &qup2 {
status = "okay";
};
-&qup2_uart17 {
- compatible = "qcom,geni-debug-uart";
- status = "okay";
-};
-
&remoteproc_nsp0 {
firmware-name = "qcom/sa8540p/cdsp.mbn";
status = "okay";
@@ -207,6 +202,11 @@ &remoteproc_nsp1 {
status = "okay";
};
+&uart17 {
+ compatible = "qcom,geni-debug-uart";
+ status = "okay";
+};
+
&ufs_mem_hc {
reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
index 551768f97729..db273face248 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
@@ -17,7 +17,7 @@ / {
compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp";
aliases {
- serial0 = &qup2_uart17;
+ serial0 = &uart17;
};
backlight {
@@ -363,12 +363,6 @@ keyboard@68 {
};
};
-&qup2_uart17 {
- compatible = "qcom,geni-debug-uart";
-
- status = "okay";
-};
-
&remoteproc_adsp {
firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
@@ -381,6 +375,12 @@ &remoteproc_nsp0 {
status = "okay";
};
+&uart17 {
+ compatible = "qcom,geni-debug-uart";
+
+ status = "okay";
+};
+
&ufs_mem_hc {
reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 109c9d2b684d..951cb1b6fcc4 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -813,7 +813,7 @@ qup2: geniqup@8c0000 {
status = "disabled";
- qup2_uart17: serial@884000 {
+ uart17: serial@884000 {
compatible = "qcom,geni-uart";
reg = <0 0x00884000 0 0x4000>;
clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>;
--
2.38.1
On 14.12.2022 18:11, Brian Masney wrote:
> In preparation for adding the missing SPI and I2C nodes to
> sc8280xp.dtsi, it was decided to rename all of the existing qupX_
> uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
> and rename qup2_uart17 to uart17. Note that some nodes are moved in the
> file by this patch to preserve the expected sort order in the file.
>
> Signed-off-by: Brian Masney <[email protected]>
> Link: https://lore.kernel.org/lkml/[email protected]/
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
> This is a new patch that's introduced in v2.
>
> arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 12 ++++++------
> arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 12 ++++++------
> arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 14 +++++++-------
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
> 4 files changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> index 84cb6f3eeb56..61f2e44e70c1 100644
> --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> @@ -17,7 +17,7 @@ / {
> compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
>
> aliases {
> - serial0 = &qup2_uart17;
> + serial0 = &uart17;
> };
>
> chosen {
> @@ -240,11 +240,6 @@ &qup2 {
> status = "okay";
> };
>
> -&qup2_uart17 {
> - compatible = "qcom,geni-debug-uart";
> - status = "okay";
> -};
> -
> &remoteproc_adsp {
> firmware-name = "qcom/sa8540p/adsp.mbn";
> status = "okay";
> @@ -338,6 +333,11 @@ pm8450g_gpios: gpio@c000 {
> };
> };
>
> +&uart17 {
> + compatible = "qcom,geni-debug-uart";
> + status = "okay";
> +};
> +
> &ufs_mem_hc {
> reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> index 21f3ff024910..b6e0db5508c7 100644
> --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> @@ -17,7 +17,7 @@ / {
> compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
>
> aliases {
> - serial0 = &qup2_uart17;
> + serial0 = &uart17;
> };
>
> chosen {
> @@ -192,11 +192,6 @@ &qup2 {
> status = "okay";
> };
>
> -&qup2_uart17 {
> - compatible = "qcom,geni-debug-uart";
> - status = "okay";
> -};
> -
> &remoteproc_nsp0 {
> firmware-name = "qcom/sa8540p/cdsp.mbn";
> status = "okay";
> @@ -207,6 +202,11 @@ &remoteproc_nsp1 {
> status = "okay";
> };
>
> +&uart17 {
> + compatible = "qcom,geni-debug-uart";
> + status = "okay";
> +};
> +
> &ufs_mem_hc {
> reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> index 551768f97729..db273face248 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> @@ -17,7 +17,7 @@ / {
> compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp";
>
> aliases {
> - serial0 = &qup2_uart17;
> + serial0 = &uart17;
> };
>
> backlight {
> @@ -363,12 +363,6 @@ keyboard@68 {
> };
> };
>
> -&qup2_uart17 {
> - compatible = "qcom,geni-debug-uart";
> -
> - status = "okay";
> -};
> -
> &remoteproc_adsp {
> firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
>
> @@ -381,6 +375,12 @@ &remoteproc_nsp0 {
> status = "okay";
> };
>
> +&uart17 {
> + compatible = "qcom,geni-debug-uart";
> +
> + status = "okay";
> +};
> +
> &ufs_mem_hc {
> reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 109c9d2b684d..951cb1b6fcc4 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -813,7 +813,7 @@ qup2: geniqup@8c0000 {
>
> status = "disabled";
>
> - qup2_uart17: serial@884000 {
> + uart17: serial@884000 {
> compatible = "qcom,geni-uart";
> reg = <0 0x00884000 0 0x4000>;
> clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>;