From: Nick Hawkins <[email protected]>
The GXP SoC supports 10 I2C engines. Each I2C engine is completely
independent and can function both as an I2C master and I2C slave. The
I2C master can operate in a multi master environment. The engines support
a scalable speed from 8kHZ to 1.5 Mhz.
Nick Hawkins (6):
i2c: hpe: Add GXP SoC I2C Controller
dt-bindings: i2c: hpe,gxp-i2c
dt-bindings: mfd: syscon: Document GXP register compatible
ARM: dts: hpe: Add I2C Topology
ARM: multi_v7_defconfig: add gxp i2c module
MAINTAINERS: Add HPE GXP I2C Support
.../devicetree/bindings/i2c/hpe,gxp-i2c.yaml | 63 ++
.../devicetree/bindings/mfd/syscon.yaml | 1 +
MAINTAINERS | 2 +
arch/arm/boot/dts/hpe-bmc-dl360gen10.dts | 72 ++
arch/arm/boot/dts/hpe-gxp.dtsi | 115 ++++
arch/arm/configs/multi_v7_defconfig | 1 +
drivers/i2c/busses/Kconfig | 7 +
drivers/i2c/busses/Makefile | 1 +
drivers/i2c/busses/i2c-gxp.c | 641 ++++++++++++++++++
9 files changed, 903 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml
create mode 100644 drivers/i2c/busses/i2c-gxp.c
--
2.17.1
From: Nick Hawkins <[email protected]>
Add the I2C controller source and bindings.
Signed-off-by: Nick Hawkins <[email protected]>
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 1daadaa4d48b..d671a8b6968e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2217,12 +2217,14 @@ M: Jean-Marie Verdun <[email protected]>
M: Nick Hawkins <[email protected]>
S: Maintained
F: Documentation/devicetree/bindings/arm/hpe,gxp.yaml
+F: Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml
F: Documentation/devicetree/bindings/spi/hpe,gxp-spifi.yaml
F: Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml
F: arch/arm/boot/dts/hpe-bmc*
F: arch/arm/boot/dts/hpe-gxp*
F: arch/arm/mach-hpe/
F: drivers/clocksource/timer-gxp.c
+F: drivers/i2c/busses/i2c-gxp.c
F: drivers/spi/spi-gxp.c
F: drivers/watchdog/gxp-wdt.c
--
2.17.1
From: Nick Hawkins <[email protected]>
Add 9 I2C Engines, 2 MUXs, and a EEPROM to the device tree.
Signed-off-by: Nick Hawkins <[email protected]>
---
arch/arm/boot/dts/hpe-bmc-dl360gen10.dts | 72 ++++++++++++++
arch/arm/boot/dts/hpe-gxp.dtsi | 115 +++++++++++++++++++++++
2 files changed, 187 insertions(+)
diff --git a/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
index 3a7382ce40ef..d9008e2cfed3 100644
--- a/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
+++ b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
@@ -23,4 +23,76 @@
device_type = "memory";
reg = <0x40000000 0x20000000>;
};
+
+ i2cmux@4 {
+ compatible = "i2c-mux-reg";
+ i2c-parent = <&i2c4>;
+ reg = <0xd1000074 1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c4@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c4@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c4@4 {
+ reg = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ i2cmux@6 {
+ compatible = "i2c-mux-reg";
+ i2c-parent = <&i2c6>;
+ reg = <0xd1000076 1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c6@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c6@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c6@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c6@4 {
+ reg = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c6@5 {
+ reg = <5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&i2c2 {
+ eeprom@50 {
+ compatible = "atmel,24c02";
+ pagesize = <8>;
+ reg = <0x50>;
+ };
};
diff --git a/arch/arm/boot/dts/hpe-gxp.dtsi b/arch/arm/boot/dts/hpe-gxp.dtsi
index cf735b3c4f35..27e68932021c 100644
--- a/arch/arm/boot/dts/hpe-gxp.dtsi
+++ b/arch/arm/boot/dts/hpe-gxp.dtsi
@@ -122,6 +122,121 @@
interrupts = <6>;
interrupt-parent = <&vic0>;
};
+
+ sysreg_system_controller: syscon@f8 {
+ compatible = "hpe,gxp-sysreg", "syscon";
+ reg = <0xf8 0x8>;
+ };
+
+ i2c0: i2c@2000 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2000 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c1: i2c@2100 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2100 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c2: i2c@2200 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2200 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c3: i2c@2300 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2300 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c4: i2c@2400 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2400 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c5: i2c@2500 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2500 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c6: i2c@2600 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2600 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c7: i2c@2700 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2700 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c8: i2c@2800 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2800 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
+
+ i2c9: i2c@2900 {
+ compatible = "hpe,gxp-i2c";
+ reg = <0x2900 0x70>;
+ interrupts = <9>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hpe,sysreg-phandle = <&sysreg_system_controller>;
+ hpe,i2c-max-bus-freq = <100000>;
+ };
};
};
};
--
2.17.1
From: Nick Hawkins <[email protected]>
Add the CONFIG_I2C_GXP symbol to enable the GXP SoC I2C capabilities.
Signed-off-by: Nick Hawkins <[email protected]>
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index b61b2e3d116b..8a19b1dc10d0 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -411,6 +411,7 @@ CONFIG_I2C_DAVINCI=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_DIGICOLOR=m
CONFIG_I2C_EMEV2=m
+CONFIG_I2C_GXP=m
CONFIG_I2C_IMX=y
CONFIG_I2C_MESON=y
CONFIG_I2C_MV64XXX=y
--
2.17.1
On 16/12/2022 19:35, [email protected] wrote:
> From: Nick Hawkins <[email protected]>
>
> Add 9 I2C Engines, 2 MUXs, and a EEPROM to the device tree.
>
> Signed-off-by: Nick Hawkins <[email protected]>
> ---
> arch/arm/boot/dts/hpe-bmc-dl360gen10.dts | 72 ++++++++++++++
> arch/arm/boot/dts/hpe-gxp.dtsi | 115 +++++++++++++++++++++++
> 2 files changed, 187 insertions(+)
>
> diff --git a/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
> index 3a7382ce40ef..d9008e2cfed3 100644
> --- a/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
> +++ b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
> @@ -23,4 +23,76 @@
> device_type = "memory";
> reg = <0x40000000 0x20000000>;
> };
> +
> + i2cmux@4 {
> + compatible = "i2c-mux-reg";
> + i2c-parent = <&i2c4>;
> + reg = <0xd1000074 1>;
Did you check this? `dtbs_check` and `dtbs W=1`? Reg looks different
than unit.
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + i2c4@1 {
Node names should be generic.
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
i2c@
> + reg = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +> + i2c4@3 {
Node names should be generic.
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
> + reg = <3>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + i2c4@4 {
Node names should be generic.
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
> + reg = <4>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +
> + i2cmux@6 {
> + compatible = "i2c-mux-reg";
> + i2c-parent = <&i2c6>;
> + reg = <0xd1000076 1>;
Same question.
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + i2c6@1 {
and so on...
> + reg = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + i2c6@2 {
> + reg = <2>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + i2c6@3 {
> + reg = <3>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + i2c6@4 {
> + reg = <4>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + i2c6@5 {
> + reg = <5>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +};
> +
> +&i2c2 {
> + eeprom@50 {
> + compatible = "atmel,24c02";
> + pagesize = <8>;
> + reg = <0x50>;
> + };
> };
> diff --git a/arch/arm/boot/dts/hpe-gxp.dtsi b/arch/arm/boot/dts/hpe-gxp.dtsi
> index cf735b3c4f35..27e68932021c 100644
> --- a/arch/arm/boot/dts/hpe-gxp.dtsi
> +++ b/arch/arm/boot/dts/hpe-gxp.dtsi
> @@ -122,6 +122,121 @@
> interrupts = <6>;
> interrupt-parent = <&vic0>;
> };
> +
> + sysreg_system_controller: syscon@f8 {
> + compatible = "hpe,gxp-sysreg", "syscon";
> + reg = <0xf8 0x8>;
> + };
> +
> + i2c0: i2c@2000 {
> + compatible = "hpe,gxp-i2c";
> + reg = <0x2000 0x70>;
> + interrupts = <9>;
> + interrupt-parent = <&vic0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + hpe,sysreg-phandle = <&sysreg_system_controller>;
> + hpe,i2c-max-bus-freq = <100000>;
Busses should stay disabled in DTSI and only enabled by specific board,
when needed.
> + };
> +
> + i2c1: i2c@2100 {
> + compatible = "hpe,gxp-i2c";
> + reg = <0x2100 0x70>;
> + interrupts = <9>;
> + interrupt-parent = <&vic0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + hpe,sysreg-phandle = <&sysreg_system_controller>;
> + hpe,i2c-max-bus-freq = <100000>;
> + };
> +
Best regards,
Krzysztof