In preparation for adding the missing SPI and I2C nodes to
sc8280xp.dtsi, it was decided to rename all of the existing qupX_
uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
and rename qup2_i2c5 to i2c21. Under the old name, this was the 5th
index under qup2, which starts at index 16.
Note that some nodes are moved in the file by this patch to preserve
the expected sort order in the file. Additionally, the properties
within the pinctrl state node are sorted to match the expected order
that's typically done in other DTs.
Signed-off-by: Brian Masney <[email protected]>
Link: https://lore.kernel.org/lkml/[email protected]/
Reviewed-by: Konrad Dybcio <[email protected]>
---
Changes from v2 to v3:
- Reordered properties on renamed state node to match order typically
done elsewhere (Konrod)
- Add Konrad's R-b
Patch introduced in v2
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 89 +++++++------
.../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 120 +++++++++---------
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
3 files changed, 105 insertions(+), 106 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
index db273face248..03e3814f2722 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
@@ -228,6 +228,43 @@ vreg_l9d: ldo9 {
};
};
+&i2c21 {
+ clock-frequency = <400000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c21_default>;
+
+ status = "okay";
+
+ touchpad@15 {
+ compatible = "hid-over-i2c";
+ reg = <0x15>;
+
+ hid-descr-addr = <0x1>;
+ interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
+ vdd-supply = <&vreg_misc_3p3>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&tpad_default>;
+
+ wakeup-source;
+ };
+
+ keyboard@68 {
+ compatible = "hid-over-i2c";
+ reg = <0x68>;
+
+ hid-descr-addr = <0x1>;
+ interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
+ vdd-supply = <&vreg_misc_3p3>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&kybd_default>;
+
+ wakeup-source;
+ };
+};
+
&pcie2a {
perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
@@ -326,43 +363,6 @@ &qup2 {
status = "okay";
};
-&qup2_i2c5 {
- clock-frequency = <400000>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&qup2_i2c5_default>;
-
- status = "okay";
-
- touchpad@15 {
- compatible = "hid-over-i2c";
- reg = <0x15>;
-
- hid-descr-addr = <0x1>;
- interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
- vdd-supply = <&vreg_misc_3p3>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&tpad_default>;
-
- wakeup-source;
- };
-
- keyboard@68 {
- compatible = "hid-over-i2c";
- reg = <0x68>;
-
- hid-descr-addr = <0x1>;
- interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
- vdd-supply = <&vreg_misc_3p3>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&kybd_default>;
-
- wakeup-source;
- };
-};
-
&remoteproc_adsp {
firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
@@ -494,6 +494,13 @@ hastings_reg_en: hastings-reg-en-state {
&tlmm {
gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>;
+ i2c21_default: i2c21-default-state {
+ pins = "gpio81", "gpio82";
+ function = "qup21";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
kybd_default: kybd-default-state {
disable-pins {
pins = "gpio102";
@@ -598,14 +605,6 @@ qup0_i2c4_default: qup0-i2c4-default-state {
drive-strength = <16>;
};
- qup2_i2c5_default: qup2-i2c5-default-state {
- pins = "gpio81", "gpio82";
- function = "qup21";
-
- bias-disable;
- drive-strength = <16>;
- };
-
tpad_default: tpad-default-state {
int-n-pins {
pins = "gpio182";
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
index 568c6be1ceaa..ad66a87141be 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
@@ -282,6 +282,59 @@ vreg_l9d: ldo9 {
};
};
+&i2c21 {
+ clock-frequency = <400000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c21_default>;
+
+ status = "okay";
+
+ touchpad@15 {
+ compatible = "hid-over-i2c";
+ reg = <0x15>;
+
+ hid-descr-addr = <0x1>;
+ interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
+ vdd-supply = <&vreg_misc_3p3>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&tpad_default>;
+
+ wakeup-source;
+
+ status = "disabled";
+ };
+
+ touchpad@2c {
+ compatible = "hid-over-i2c";
+ reg = <0x2c>;
+
+ hid-descr-addr = <0x20>;
+ interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
+ vdd-supply = <&vreg_misc_3p3>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&tpad_default>;
+
+ wakeup-source;
+ };
+
+ keyboard@68 {
+ compatible = "hid-over-i2c";
+ reg = <0x68>;
+
+ hid-descr-addr = <0x1>;
+ interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
+ vdd-supply = <&vreg_misc_3p3>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&kybd_default>;
+
+ wakeup-source;
+ };
+};
+
&pcie2a {
perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
@@ -531,59 +584,6 @@ &qup2 {
status = "okay";
};
-&qup2_i2c5 {
- clock-frequency = <400000>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&qup2_i2c5_default>;
-
- status = "okay";
-
- touchpad@15 {
- compatible = "hid-over-i2c";
- reg = <0x15>;
-
- hid-descr-addr = <0x1>;
- interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
- vdd-supply = <&vreg_misc_3p3>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&tpad_default>;
-
- wakeup-source;
-
- status = "disabled";
- };
-
- touchpad@2c {
- compatible = "hid-over-i2c";
- reg = <0x2c>;
-
- hid-descr-addr = <0x20>;
- interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
- vdd-supply = <&vreg_misc_3p3>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&tpad_default>;
-
- wakeup-source;
- };
-
- keyboard@68 {
- compatible = "hid-over-i2c";
- reg = <0x68>;
-
- hid-descr-addr = <0x1>;
- interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
- vdd-supply = <&vreg_misc_3p3>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&kybd_default>;
-
- wakeup-source;
- };
-};
-
&remoteproc_adsp {
firmware-name = "qcom/sc8280xp/LENOVO/21BX/qcadsp8280.mbn";
@@ -698,6 +698,13 @@ hall_int_n_default: hall-int-n-state {
bias-disable;
};
+ i2c21_default: i2c21-default-state {
+ pins = "gpio81", "gpio82";
+ function = "qup21";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
kybd_default: kybd-default-state {
disable-pins {
pins = "gpio102";
@@ -801,13 +808,6 @@ qup0_i2c4_default: qup0-i2c4-default-state {
drive-strength = <16>;
};
- qup2_i2c5_default: qup2-i2c5-default-state {
- pins = "gpio81", "gpio82";
- function = "qup21";
- bias-disable;
- drive-strength = <16>;
- };
-
tpad_default: tpad-default-state {
int-n-pins {
pins = "gpio182";
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 951cb1b6fcc4..929365cff555 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -827,7 +827,7 @@ uart17: serial@884000 {
status = "disabled";
};
- qup2_i2c5: i2c@894000 {
+ i2c21: i2c@894000 {
compatible = "qcom,geni-i2c";
reg = <0 0x00894000 0 0x4000>;
clock-names = "se";
--
2.38.1
On Tue, Dec 20, 2022 at 02:28:49PM -0500, Brian Masney wrote:
> In preparation for adding the missing SPI and I2C nodes to
> sc8280xp.dtsi, it was decided to rename all of the existing qupX_
> uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
> and rename qup2_i2c5 to i2c21. Under the old name, this was the 5th
> index under qup2, which starts at index 16.
>
> Note that some nodes are moved in the file by this patch to preserve
> the expected sort order in the file. Additionally, the properties
> within the pinctrl state node are sorted to match the expected order
> that's typically done in other DTs.
>
> Signed-off-by: Brian Masney <[email protected]>
> Link: https://lore.kernel.org/lkml/[email protected]/
> Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Johan Hovold <[email protected]>