This series fixes dt-schema descriptions for PCI endpoint controller
implemented in UniPhier SoCs.
Drop the patch in this series,
"dt-bindings: PCI: designware-ep: Increase maxItems of reg and reg-names",
because this was done by the commit 4cc13eedb892
("dt-bindings: PCI: dwc: Add reg/reg-names common properties").
Changes since v3:
- Drop Patch 1
"dt-bindings: PCI: designware-ep: Increase maxItems of reg and reg-names".
Changes since v2:
- Move some items to minimize if/then schemas in Patch 2
- Remove Patch 3 because the warning comment is for an unmerged source
Changes since v1:
- Fix "config" in the Patch 1 commit message to "addr_space"
Kunihiko Hayashi (1):
dt-bindings: PCI: uniphier-ep: Clean up reg, clocks, resets, and their
names using compatible string
.../pci/socionext,uniphier-pcie-ep.yaml | 76 ++++++++++++-------
1 file changed, 49 insertions(+), 27 deletions(-)
--
2.25.1
Instead of "oneOf:" choices, use "allOf:" and "if:" to define reg, clocks,
resets, and their names that can be taken by the compatible string.
The order of their names doesn't change here.
Signed-off-by: Kunihiko Hayashi <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
.../pci/socionext,uniphier-pcie-ep.yaml | 76 ++++++++++++-------
1 file changed, 49 insertions(+), 27 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml
index 437e61618d06..f0d8e486a07d 100644
--- a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml
@@ -15,9 +15,6 @@ description: |
maintainers:
- Kunihiko Hayashi <[email protected]>
-allOf:
- - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#
-
properties:
compatible:
enum:
@@ -29,40 +26,25 @@ properties:
maxItems: 5
reg-names:
- oneOf:
- - items:
- - const: dbi
- - const: dbi2
- - const: link
- - const: addr_space
- - items:
- - const: dbi
- - const: dbi2
- - const: link
- - const: addr_space
- - const: atu
+ minItems: 4
+ items:
+ - const: dbi
+ - const: dbi2
+ - const: link
+ - const: addr_space
+ - const: atu
clocks:
minItems: 1
maxItems: 2
- clock-names:
- oneOf:
- - items: # for Pro5
- - const: gio
- - const: link
- - const: link # for NX1
+ clock-names: true
resets:
minItems: 1
maxItems: 2
- reset-names:
- oneOf:
- - items: # for Pro5
- - const: gio
- - const: link
- - const: link # for NX1
+ reset-names: true
num-ib-windows:
const: 16
@@ -78,6 +60,46 @@ properties:
phy-names:
const: pcie-phy
+allOf:
+ - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: socionext,uniphier-pro5-pcie-ep
+ then:
+ properties:
+ reg:
+ maxItems: 4
+ reg-names:
+ maxItems: 4
+ clocks:
+ minItems: 2
+ clock-names:
+ items:
+ - const: gio
+ - const: link
+ resets:
+ minItems: 2
+ reset-names:
+ items:
+ - const: gio
+ - const: link
+ else:
+ properties:
+ reg:
+ minItems: 5
+ reg-names:
+ minItems: 5
+ clocks:
+ maxItems: 1
+ clock-names:
+ const: link
+ resets:
+ maxItems: 1
+ reset-names:
+ const: link
+
required:
- compatible
- reg
--
2.25.1
On Fri, 23 Dec 2022 16:07:12 +0900, Kunihiko Hayashi wrote:
> This series fixes dt-schema descriptions for PCI endpoint controller
> implemented in UniPhier SoCs.
>
> Drop the patch in this series,
> "dt-bindings: PCI: designware-ep: Increase maxItems of reg and reg-names",
> because this was done by the commit 4cc13eedb892
> ("dt-bindings: PCI: dwc: Add reg/reg-names common properties").
>
> [...]
Applied to pci/dt, thanks!
[1/1] dt-bindings: PCI: uniphier-ep: Clean up reg, clocks, resets, and their names using compatible string
https://git.kernel.org/lpieralisi/pci/c/89836d5becf2
Thanks,
Lorenzo