2022-12-28 12:00:06

by Rodrigo Vivi

[permalink] [raw]
Subject: [PATCH] x86/rapl: Treat Tigerlake like Icelake

From: Chris Wilson <[email protected]>

Since Tigerlake seems to have inherited its cstates and other rapl power
caps from Icelake, assume it also follows Icelake for its rapl events.

Signed-off-by: Chris Wilson <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
---

Based on the recent additions it looks like Tigerlake was a missed
case in these events/rapl.c and that this old patch from Chris is the
right way to go.

I found this patch on our drm-intel's topic/core-for-CI branch while
rebasing it towards v6.2-rc1.

arch/x86/events/rapl.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c
index a829492bca4c..ae5779ea4417 100644
--- a/arch/x86/events/rapl.c
+++ b/arch/x86/events/rapl.c
@@ -800,6 +800,8 @@ static const struct x86_cpu_id rapl_model_match[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &model_hsx),
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &model_skl),
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &model_skl),
+ X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &model_skl),
+ X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &model_skl),
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &model_skl),
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &model_skl),
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &model_skl),
--
2.38.1


2023-01-03 18:26:11

by tip-bot2 for Jacob Pan

[permalink] [raw]
Subject: [tip: perf/urgent] perf/x86/rapl: Treat Tigerlake like Icelake

The following commit has been merged into the perf/urgent branch of tip:

Commit-ID: c07311b5509f6035f1dd828db3e90ff4859cf3b9
Gitweb: https://git.kernel.org/tip/c07311b5509f6035f1dd828db3e90ff4859cf3b9
Author: Chris Wilson <[email protected]>
AuthorDate: Wed, 28 Dec 2022 06:34:54 -05:00
Committer: Ingo Molnar <[email protected]>
CommitterDate: Tue, 03 Jan 2023 18:55:35 +01:00

perf/x86/rapl: Treat Tigerlake like Icelake

Since Tigerlake seems to have inherited its cstates and other RAPL power
caps from Icelake, assume it also follows Icelake for its RAPL events.

Signed-off-by: Chris Wilson <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Stephane Eranian <[email protected]>
Cc: Zhang Rui <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
arch/x86/events/rapl.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c
index a829492..ae5779e 100644
--- a/arch/x86/events/rapl.c
+++ b/arch/x86/events/rapl.c
@@ -800,6 +800,8 @@ static const struct x86_cpu_id rapl_model_match[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &model_hsx),
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &model_skl),
X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &model_skl),
+ X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &model_skl),
+ X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &model_skl),
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &model_skl),
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &model_skl),
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &model_skl),