2022-12-29 10:59:41

by Chen-Yu Tsai

Subject: [PATCH v2] arm64: dts: mediatek: mt8192: Mark scp_adsp clock as broken

The scp_adsp clock controller is under the SCP_ADSP power domain. This
power domain is currently not supported nor defined.

Mark the clock controller as broken for now, to avoid the system from
trying to access it, and causing the CPU or bus to stall.

Fixes: 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers")
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
Changes since v1:
- Changed "broken" to "fail"
- Rebased onto v6.2-rc1 plus v6.2-tmp/* from mediatek repo

arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index dd618c563e8a..ef4fcefa2bfc 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -644,6 +644,8 @@ scp_adsp: clock-controller@10720000 {
compatible = "mediatek,mt8192-scp_adsp";
reg = <0 0x10720000 0 0x1000>;
#clock-cells = <1>;
+ /* power domain dependency not upstreamed */
+ status = "fail";
};

uart0: serial@11002000 {
--
2.39.0.314.g84b9a713c41-goog

2023-01-13 19:32:31

by Nícolas F. R. A. Prado

Subject: Re: [PATCH v2] arm64: dts: mediatek: mt8192: Mark scp_adsp clock as broken

On Thu, Dec 29, 2022 at 06:12:02PM +0800, Chen-Yu Tsai wrote:
> The scp_adsp clock controller is under the SCP_ADSP power domain. This
> power domain is currently not supported nor defined.
>
> Mark the clock controller as broken for now, to avoid the system from
> trying to access it, and causing the CPU or bus to stall.
>
> Fixes: 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers")
> Signed-off-by: Chen-Yu Tsai <[email protected]>

Reviewed-by: N?colas F. R. A. Prado <[email protected]>
Tested-by: N?colas F. R. A. Prado <[email protected]>

Even though personally I couldn't notice any such CPU or bus stall after
manually enabling or reading back the scp_adsp_audiodsp clock without the patch
applied.

Thanks,
N?colas

2023-01-19 18:05:01

by Matthias Brugger

Subject: Re: [PATCH v2] arm64: dts: mediatek: mt8192: Mark scp_adsp clock as broken

On 29/12/2022 11:12, Chen-Yu Tsai wrote:
> The scp_adsp clock controller is under the SCP_ADSP power domain. This
> power domain is currently not supported nor defined.
>
> Mark the clock controller as broken for now, to avoid the system from
> trying to access it, and causing the CPU or bus to stall.
>
> Fixes: 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers")
> Signed-off-by: Chen-Yu Tsai <[email protected]>

Applied thanks!

> ---
> Changes since v1:
> - Changed "broken" to "fail"
> - Rebased onto v6.2-rc1 plus v6.2-tmp/* from mediatek repo
>
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index dd618c563e8a..ef4fcefa2bfc 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -644,6 +644,8 @@ scp_adsp: clock-controller@10720000 {
> compatible = "mediatek,mt8192-scp_adsp";
> reg = <0 0x10720000 0 0x1000>;
> #clock-cells = <1>;
> + /* power domain dependency not upstreamed */
> + status = "fail";
> };
>
> uart0: serial@11002000 {