Some NAND chips have a number of pages that is not exactly a power of
two. Support this by calculating the shifts and masks for the next
larger power of two.
Signed-off-by: Samuel Holland <[email protected]>
---
drivers/mtd/nand/raw/nand_base.c | 14 +++++---------
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index c3cc66039925..f46bad7796ed 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5003,6 +5003,7 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
u8 *id_data = chip->id.data;
u8 maf_id, dev_id;
u64 targetsize;
+ u32 chip_page_shift;
/*
* Let's start by initializing memorg fields that might be left
@@ -5148,18 +5149,13 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)
chip->page_shift = ffs(mtd->writesize) - 1;
/* Convert chipsize to number of pages per chip -1 */
targetsize = nanddev_target_size(&chip->base);
- chip->pagemask = (targetsize >> chip->page_shift) - 1;
+ chip_page_shift = order_base_2(targetsize >> chip->page_shift);
+ chip->pagemask = BIT(chip_page_shift) - 1;
chip->bbt_erase_shift = chip->phys_erase_shift =
ffs(mtd->erasesize) - 1;
- if (targetsize & 0xffffffff)
- chip->chip_shift = ffs((unsigned)targetsize) - 1;
- else {
- chip->chip_shift = ffs((unsigned)(targetsize >> 32));
- chip->chip_shift += 32 - 1;
- }
-
- if (chip->chip_shift - chip->page_shift > 16)
+ chip->chip_shift = chip_page_shift + chip->page_shift;
+ if (chip_page_shift > 16)
chip->options |= NAND_ROW_ADDR_3;
chip->badblockbits = 8;
--
2.37.4