The GPC node references an interrupt parent, but it doesn't
state the interrupt itself. According to the TRM, this IRQ
is 87. This also eliminate an error detected from dt_binding_check
Fixes: fc0f05124621 ("arm64: dts: imx8mp: add GPC node with GPU power domains")
Signed-off-by: Adam Ford <[email protected]>
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 7a6e6221f421..7a8ca56e48b6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -524,6 +524,7 @@ gpc: gpc@303a0000 {
compatible = "fsl,imx8mp-gpc";
reg = <0x303a0000 0x1000>;
interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <3>;
--
2.34.1
dt_binding_check detects an issue with the pgc_hsiomix power
domain:
pgc: 'power-domains@17' does not match any of the regexes
This is because 'power-domains' should be 'power-domain'
Fixes: 2ae42e0c0b67 ("arm64: dts: imx8mp: add HSIO power-domains")
Signed-off-by: Adam Ford <[email protected]>
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 7a8ca56e48b6..19609ef0560a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -591,7 +591,7 @@ pgc_mipi_phy2: power-domain@16 {
reg = <IMX8MP_POWER_DOMAIN_MIPI_PHY2>;
};
- pgc_hsiomix: power-domains@17 {
+ pgc_hsiomix: power-domain@17 {
#power-domain-cells = <0>;
reg = <IMX8MP_POWER_DOMAIN_HSIOMIX>;
clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
--
2.34.1
Hi Adam,
Thank you for the patch.
On Sat, Dec 17, 2022 at 12:08:48PM -0600, Adam Ford wrote:
> The GPC node references an interrupt parent, but it doesn't
> state the interrupt itself. According to the TRM, this IRQ
> is 87. This also eliminate an error detected from dt_binding_check
The interrupt isn't used by the driver as far as I can see, so I can't
test this, but the patch matches the reference manual, so
Reviewed-by: Laurent Pinchart <[email protected]>
> Fixes: fc0f05124621 ("arm64: dts: imx8mp: add GPC node with GPU power domains")
> Signed-off-by: Adam Ford <[email protected]>
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 7a6e6221f421..7a8ca56e48b6 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -524,6 +524,7 @@ gpc: gpc@303a0000 {
> compatible = "fsl,imx8mp-gpc";
> reg = <0x303a0000 0x1000>;
> interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-controller;
> #interrupt-cells = <3>;
>
--
Regards,
Laurent Pinchart
Hi Adam,
Thank you for the patch.
On Sat, Dec 17, 2022 at 12:08:49PM -0600, Adam Ford wrote:
> dt_binding_check detects an issue with the pgc_hsiomix power
> domain:
> pgc: 'power-domains@17' does not match any of the regexes
>
> This is because 'power-domains' should be 'power-domain'
Oops.
Reviewed-by: Laurent Pinchart <[email protected]>
> Fixes: 2ae42e0c0b67 ("arm64: dts: imx8mp: add HSIO power-domains")
> Signed-off-by: Adam Ford <[email protected]>
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 7a8ca56e48b6..19609ef0560a 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -591,7 +591,7 @@ pgc_mipi_phy2: power-domain@16 {
> reg = <IMX8MP_POWER_DOMAIN_MIPI_PHY2>;
> };
>
> - pgc_hsiomix: power-domains@17 {
> + pgc_hsiomix: power-domain@17 {
> #power-domain-cells = <0>;
> reg = <IMX8MP_POWER_DOMAIN_HSIOMIX>;
> clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
--
Regards,
Laurent Pinchart
On Sun, Dec 18, 2022 at 9:00 AM Laurent Pinchart
<[email protected]> wrote:
>
> Hi Adam,
>
> Thank you for the patch.
>
> On Sat, Dec 17, 2022 at 12:08:48PM -0600, Adam Ford wrote:
> > The GPC node references an interrupt parent, but it doesn't
> > state the interrupt itself. According to the TRM, this IRQ
> > is 87. This also eliminate an error detected from dt_binding_check
>
> The interrupt isn't used by the driver as far as I can see, so I can't
> test this, but the patch matches the reference manual, so
I don't think it changes functionality, but the other imx8m boards
have it, and 'make dtbs_check' showed it as missing.
Thanks for the review.
>
> Reviewed-by: Laurent Pinchart <[email protected]>
>
> > Fixes: fc0f05124621 ("arm64: dts: imx8mp: add GPC node with GPU power domains")
> > Signed-off-by: Adam Ford <[email protected]>
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index 7a6e6221f421..7a8ca56e48b6 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -524,6 +524,7 @@ gpc: gpc@303a0000 {
> > compatible = "fsl,imx8mp-gpc";
> > reg = <0x303a0000 0x1000>;
> > interrupt-parent = <&gic>;
> > + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
> > interrupt-controller;
> > #interrupt-cells = <3>;
> >
>
> --
> Regards,
>
> Laurent Pinchart
On Sat, Dec 17, 2022 at 12:08:48PM -0600, Adam Ford wrote:
> The GPC node references an interrupt parent, but it doesn't
> state the interrupt itself. According to the TRM, this IRQ
> is 87. This also eliminate an error detected from dt_binding_check
>
> Fixes: fc0f05124621 ("arm64: dts: imx8mp: add GPC node with GPU power domains")
> Signed-off-by: Adam Ford <[email protected]>
Applied both, thanks!