From: Matthias Schiffer <[email protected]>
A mv88e6250 family (i.e. LinkStreet) switch with 2 PHY and RMII ports
and no PTP support.
Signed-off-by: Matthias Schiffer <[email protected]>
Signed-off-by: Lukasz Majewski <[email protected]>
---
Changes for v2:
- Add S-o-B
- Update commit message
- Add information about max packet size (2048 B)
Changes for v3:
- None
---
drivers/net/dsa/mv88e6xxx/chip.c | 21 +++++++++++++++++++++
drivers/net/dsa/mv88e6xxx/chip.h | 1 +
drivers/net/dsa/mv88e6xxx/port.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 19668e549391..be563b6e5a89 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -5536,6 +5536,27 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = {
};
static const struct mv88e6xxx_info mv88e6xxx_table[] = {
+ [MV88E6020] = {
+ .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6020,
+ .family = MV88E6XXX_FAMILY_6250,
+ .name = "Marvell 88E6020",
+ .num_databases = 64,
+ .num_ports = 7,
+ .num_internal_phys = 5,
+ .max_vid = 4095,
+ .max_frame_size = 2048,
+ .port_base_addr = 0x8,
+ .phy_base_addr = 0x0,
+ .global1_addr = 0xf,
+ .global2_addr = 0x7,
+ .age_time_coeff = 15000,
+ .g1_irqs = 9,
+ .g2_irqs = 5,
+ .atu_move_port_mask = 0xf,
+ .dual_chip = true,
+ .ops = &mv88e6250_ops,
+ },
+
[MV88E6085] = {
.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6085,
.family = MV88E6XXX_FAMILY_6097,
diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h
index 55948ef56cd0..0d838e1c8996 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.h
+++ b/drivers/net/dsa/mv88e6xxx/chip.h
@@ -54,6 +54,7 @@ enum mv88e6xxx_frame_mode {
/* List of supported models */
enum mv88e6xxx_model {
+ MV88E6020,
MV88E6085,
MV88E6095,
MV88E6097,
diff --git a/drivers/net/dsa/mv88e6xxx/port.h b/drivers/net/dsa/mv88e6xxx/port.h
index aec9d4fd20e3..169ce5b6fa31 100644
--- a/drivers/net/dsa/mv88e6xxx/port.h
+++ b/drivers/net/dsa/mv88e6xxx/port.h
@@ -111,6 +111,7 @@
/* Offset 0x03: Switch Identifier Register */
#define MV88E6XXX_PORT_SWITCH_ID 0x03
#define MV88E6XXX_PORT_SWITCH_ID_PROD_MASK 0xfff0
+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6020 0x0200
#define MV88E6XXX_PORT_SWITCH_ID_PROD_6085 0x04a0
#define MV88E6XXX_PORT_SWITCH_ID_PROD_6095 0x0950
#define MV88E6XXX_PORT_SWITCH_ID_PROD_6097 0x0990
--
2.20.1
On Mon, Jan 02, 2023 at 04:02:08PM +0100, Lukasz Majewski wrote:
> From: Matthias Schiffer <[email protected]>
>
> A mv88e6250 family (i.e. LinkStreet) switch with 2 PHY and RMII ports
> and no PTP support.
> static const struct mv88e6xxx_info mv88e6xxx_table[] = {
> + [MV88E6020] = {
> + .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6020,
> + .family = MV88E6XXX_FAMILY_6250,
> + .name = "Marvell 88E6020",
> + .num_databases = 64,
> + .num_ports = 7,
> + .num_internal_phys = 5,
You say in the commit message there are two PHYs, yet you have 5 here?
Andrew
Hi Andrew,
> On Mon, Jan 02, 2023 at 04:02:08PM +0100, Lukasz Majewski wrote:
> > From: Matthias Schiffer <[email protected]>
> >
> > A mv88e6250 family (i.e. LinkStreet) switch with 2 PHY and RMII
> > ports and no PTP support.
>
> > static const struct mv88e6xxx_info mv88e6xxx_table[] = {
> > + [MV88E6020] = {
> > + .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6020,
> > + .family = MV88E6XXX_FAMILY_6250,
> > + .name = "Marvell 88E6020",
> > + .num_databases = 64,
> > + .num_ports = 7,
> > + .num_internal_phys = 5,
>
> You say in the commit message there are two PHYs, yet you have 5 here?
>
It looks like mine copy-paste error.
In the documentation there is stated that the 88E6020 device contains
two 10BASE-T/100BASE-TX transceivers (PHYs) and four independent Fast
Ethernet MACs (so it is a 2+2 device).
The 88E6071 is 5+2 device, so I'm going to correct this value to 2.
Also num_ports needs to be updated to 4.
> Andrew
Best regards,
Lukasz Majewski
--
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