2023-01-06 03:43:41

by xurui

[permalink] [raw]
Subject: [RFC] MIPS: Fix a compilation issue

arch/mips/include/asm/mach-rc32434/pci.h:377:
cc1: error: result of ‘-117440512 << 16’ requires 44 bits to represent, but ‘int’ only has 32 bits [-Werror=shift-overflow=]

I guss we don`t need a left shift here?

Signed-off-by: xurui <[email protected]>
---
arch/mips/include/asm/mach-rc32434/pci.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/mach-rc32434/pci.h b/arch/mips/include/asm/mach-rc32434/pci.h
index 9a6eefd12757..3eb767c8a4ee 100644
--- a/arch/mips/include/asm/mach-rc32434/pci.h
+++ b/arch/mips/include/asm/mach-rc32434/pci.h
@@ -374,7 +374,7 @@ struct pci_msu {
PCI_CFG04_STAT_SSE | \
PCI_CFG04_STAT_PE)

-#define KORINA_CNFG1 ((KORINA_STAT<<16)|KORINA_CMD)
+#define KORINA_CNFG1 (KORINA_STAT | KORINA_CMD)

#define KORINA_REVID 0
#define KORINA_CLASS_CODE 0
--
2.25.1


2023-01-06 23:57:52

by Randy Dunlap

[permalink] [raw]
Subject: Re: [RFC] MIPS: Fix a compilation issue

Hi--

On 1/5/23 19:09, xurui wrote:
> arch/mips/include/asm/mach-rc32434/pci.h:377:
> cc1: error: result of ‘-117440512 << 16’ requires 44 bits to represent, but ‘int’ only has 32 bits [-Werror=shift-overflow=]
>
> I guss we don`t need a left shift here?
>
> Signed-off-by: xurui <[email protected]>
> ---
> arch/mips/include/asm/mach-rc32434/pci.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/include/asm/mach-rc32434/pci.h b/arch/mips/include/asm/mach-rc32434/pci.h
> index 9a6eefd12757..3eb767c8a4ee 100644
> --- a/arch/mips/include/asm/mach-rc32434/pci.h
> +++ b/arch/mips/include/asm/mach-rc32434/pci.h
> @@ -374,7 +374,7 @@ struct pci_msu {
> PCI_CFG04_STAT_SSE | \
> PCI_CFG04_STAT_PE)
>
> -#define KORINA_CNFG1 ((KORINA_STAT<<16)|KORINA_CMD)
> +#define KORINA_CNFG1 (KORINA_STAT | KORINA_CMD)

I looked at all of the macro values here and this change makes sense to me,
although I know nothing about these registers.

Thanks.

>
> #define KORINA_REVID 0
> #define KORINA_CLASS_CODE 0

--
~Randy