This series is based on next-20230106.
In some cases, we may need toprgu to reset the wdt counter after wdt
resets.
Provide a reset_by_toprgu parameter for configuration. We can disable
or enable it by adding reset_by_toprgu in dts.
Allen-KH Cheng (2):
dt-bindings: watchdog: mtk-wdt: Add reset-by-toprgu support
watchdog: mtk_wdt: Add reset_by_toprgu support
.../devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml | 4 ++++
drivers/watchdog/mtk_wdt.c | 7 +++++++
2 files changed, 11 insertions(+)
--
2.18.0
In some cases, the MediaTek watchdog requires the toprgu to reset
counter after wdt resets.
Provide a reset_by_toprgu parameter for configuration.
Signed-off-by: Allen-KH Cheng <[email protected]>
---
drivers/watchdog/mtk_wdt.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
index 3e6212591e69..a9c437598e7e 100644
--- a/drivers/watchdog/mtk_wdt.c
+++ b/drivers/watchdog/mtk_wdt.c
@@ -50,6 +50,7 @@
#define WDT_MODE_IRQ_EN (1 << 3)
#define WDT_MODE_AUTO_START (1 << 4)
#define WDT_MODE_DUAL_EN (1 << 6)
+#define WDT_MODE_CNT_SEL (1 << 8)
#define WDT_MODE_KEY 0x22000000
#define WDT_SWRST 0x14
@@ -70,6 +71,7 @@ struct mtk_wdt_dev {
spinlock_t lock; /* protects WDT_SWSYSRST reg */
struct reset_controller_dev rcdev;
bool disable_wdt_extrst;
+ bool reset_by_toprgu;
};
struct mtk_wdt_data {
@@ -279,6 +281,8 @@ static int mtk_wdt_start(struct watchdog_device *wdt_dev)
reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
if (mtk_wdt->disable_wdt_extrst)
reg &= ~WDT_MODE_EXRST_EN;
+ if (mtk_wdt->reset_by_toprgu)
+ reg |= WDT_MODE_CNT_SEL;
reg |= (WDT_MODE_EN | WDT_MODE_KEY);
iowrite32(reg, wdt_base + WDT_MODE);
@@ -408,6 +412,9 @@ static int mtk_wdt_probe(struct platform_device *pdev)
mtk_wdt->disable_wdt_extrst =
of_property_read_bool(dev->of_node, "mediatek,disable-extrst");
+ mtk_wdt->reset_by_toprgu =
+ of_property_read_bool(dev->of_node, "mediatek,reset-by-toprgu");
+
return 0;
}
--
2.18.0
In some applications, the mtk-wdt requires the toprgu (TOP Reset
Generation Unit) to reset counter after wdt resets. Add optional
mediatek,reset-by-toprgu property to enable it.
Signed-off-by: Allen-KH Cheng <[email protected]>
---
.../devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
index b3605608410c..bf06dcd0c12c 100644
--- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
@@ -52,6 +52,10 @@ properties:
description: Disable sending output reset signal
type: boolean
+ mediatek,reset-by-toprgu:
+ description: Reset counter by toprgu
+ type: boolean
+
'#reset-cells':
const: 1
--
2.18.0
On 06/01/2023 12:53, Allen-KH Cheng wrote:
> In some applications, the mtk-wdt requires the toprgu (TOP Reset
> Generation Unit) to reset counter after wdt resets. Add optional
> mediatek,reset-by-toprgu property to enable it.
>
> Signed-off-by: Allen-KH Cheng <[email protected]>
> ---
> .../devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> index b3605608410c..bf06dcd0c12c 100644
> --- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> @@ -52,6 +52,10 @@ properties:
> description: Disable sending output reset signal
> type: boolean
>
> + mediatek,reset-by-toprgu:
> + description: Reset counter by toprgu
Do not copy the property name in description but actually describe it.
Also "toprgu" is a bit cryptic.
Best regards,
Krzysztof
Hi Krzysztof,
On Fri, 2023-01-06 at 13:30 +0100, Krzysztof Kozlowski wrote:
> On 06/01/2023 12:53, Allen-KH Cheng wrote:
> > In some applications, the mtk-wdt requires the toprgu (TOP Reset
> > Generation Unit) to reset counter after wdt resets. Add optional
> > mediatek,reset-by-toprgu property to enable it.
> >
> > Signed-off-by: Allen-KH Cheng <[email protected]>
> > ---
> > .../devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml | 4
> > ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> > b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> > index b3605608410c..bf06dcd0c12c 100644
> > --- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-
> > wdt.yaml
> > +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-
> > wdt.yaml
> > @@ -52,6 +52,10 @@ properties:
> > description: Disable sending output reset signal
> > type: boolean
> >
> > + mediatek,reset-by-toprgu:
> > + description: Reset counter by toprgu
>
> Do not copy the property name in description but actually describe
> it.
>
> Also "toprgu" is a bit cryptic.
>
> Best regards,
> Krzysztof
>
Sorry for being unclear.
We name toprgu for "TOP Reset Generation Unit" in the mtk SoC, which is
used to reset the system.
mediatek,reset-by-toprgu:
description: If present, means the watchdog timer will reset by
toprgu after system resets.
What do you think?
Thanks,
Allen