2023-01-06 17:14:54

by Herve Codina

[permalink] [raw]
Subject: [PATCH v2 00/10] Add the PowerQUICC audio support using the QMC

Hi,

This series adds support for audio using the QMC controller
available in some Freescale PowerQUICC SoCs.

This series contains three parts in order to show the different
blocks hierarchy and their usage in this support.

The first one is related to TSA (Time Slot Assigner).
The TSA handles the data present at the pin level (TDM with up
to 64 time slots) and dispatchs them to one or more serial
controller (SCC).

The second is related to QMC (QUICC Multichannel Controller).
The QMC handles the data at the serial controller (SCC) level
and splits again the data to creates some virtual channels.

The last one is related to the audio component (QMC audio).
It is the glue between the QMC controller and the ASoC
component. It handles one or more QMC virtual channels and
creates one DAI per QMC virtual channels handled.

Compared to the v1 series, this v2 series fixes errors raised
by the test kernel robot.

Best regards,
Herve Codina

Changes v1 -> v2:
- patch 2 and 6
Fix kernel test robot errors

- other patches
No changes

Herve Codina (10):
dt-bindings: soc: fsl: cpm_qe: Add TSA controller
soc: fsl: qe: Add support for TSA
MAINTAINERS: add the Freescale TSA controller entry
powerpc/8xx: Use a larger CPM1 command check mask
dt-bindings: soc: fsl: cpm_qe: Add QMC controller
soc: fsl: qe: Add support for QMC
MAINTAINERS: add the Freescale QMC controller entry
dt-bindings: sound: Add support for QMC audio
ASoC: fsl: Add support for QMC audio
MAINTAINERS: add the Freescale QMC audio entry

.../bindings/soc/fsl/cpm_qe/fsl,qmc.yaml | 167 ++
.../bindings/soc/fsl/cpm_qe/fsl,tsa.yaml | 262 +++
.../bindings/sound/fsl,qmc-audio.yaml | 110 ++
MAINTAINERS | 25 +
arch/powerpc/platforms/8xx/cpm1.c | 2 +-
drivers/soc/fsl/qe/Kconfig | 23 +
drivers/soc/fsl/qe/Makefile | 2 +
drivers/soc/fsl/qe/qmc.c | 1493 +++++++++++++++++
drivers/soc/fsl/qe/tsa.c | 783 +++++++++
drivers/soc/fsl/qe/tsa.h | 43 +
include/dt-bindings/soc/fsl-tsa.h | 15 +
include/soc/fsl/qe/qmc.h | 71 +
sound/soc/fsl/Kconfig | 9 +
sound/soc/fsl/Makefile | 2 +
sound/soc/fsl/fsl_qmc_audio.c | 731 ++++++++
15 files changed, 3737 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qmc.yaml
create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,tsa.yaml
create mode 100644 Documentation/devicetree/bindings/sound/fsl,qmc-audio.yaml
create mode 100644 drivers/soc/fsl/qe/qmc.c
create mode 100644 drivers/soc/fsl/qe/tsa.c
create mode 100644 drivers/soc/fsl/qe/tsa.h
create mode 100644 include/dt-bindings/soc/fsl-tsa.h
create mode 100644 include/soc/fsl/qe/qmc.h
create mode 100644 sound/soc/fsl/fsl_qmc_audio.c

--
2.38.1


2023-01-06 17:16:24

by Herve Codina

[permalink] [raw]
Subject: [PATCH v2 04/10] powerpc/8xx: Use a larger CPM1 command check mask

The CPM1 command mask is defined for use with the standard
CPM1 command register as described in the user's manual:
0 |1 3|4 7|8 11|12 14| 15|
RST| - |OPCODE|CH_NUM| - |FLG|

In the QMC extension the CPM1 command register is redefined
(QMC supplement user's manuel) with the following mapping:
0 |1 3|4 7|8 13|14| 15|
RST|QMC OPCODE| 1110|CHANNEL_NUMBER| -|FLG|

Extend the check command mask in order to support both the
standard CH_NUM field and the QMC extension CHANNEL_NUMBER
field.

Signed-off-by: Herve Codina <[email protected]>
---
arch/powerpc/platforms/8xx/cpm1.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/platforms/8xx/cpm1.c b/arch/powerpc/platforms/8xx/cpm1.c
index 8ef1f4392086..6b828b9f90d9 100644
--- a/arch/powerpc/platforms/8xx/cpm1.c
+++ b/arch/powerpc/platforms/8xx/cpm1.c
@@ -100,7 +100,7 @@ int cpm_command(u32 command, u8 opcode)
int i, ret;
unsigned long flags;

- if (command & 0xffffff0f)
+ if (command & 0xffffff03)
return -EINVAL;

spin_lock_irqsave(&cmd_lock, flags);
--
2.38.1

2023-01-10 08:36:11

by Christophe Leroy

[permalink] [raw]
Subject: Re: [PATCH v2 04/10] powerpc/8xx: Use a larger CPM1 command check mask



Le 06/01/2023 à 17:37, Herve Codina a écrit :
> The CPM1 command mask is defined for use with the standard
> CPM1 command register as described in the user's manual:
> 0 |1 3|4 7|8 11|12 14| 15|
> RST| - |OPCODE|CH_NUM| - |FLG|
>
> In the QMC extension the CPM1 command register is redefined
> (QMC supplement user's manuel) with the following mapping:
> 0 |1 3|4 7|8 13|14| 15|
> RST|QMC OPCODE| 1110|CHANNEL_NUMBER| -|FLG|
>
> Extend the check command mask in order to support both the
> standard CH_NUM field and the QMC extension CHANNEL_NUMBER
> field.
>
> Signed-off-by: Herve Codina <[email protected]>

Acked-by: Christophe Leroy <[email protected]> (As maintainer
of LINUX FOR POWERPC EMBEDDED PPC8XX)

> ---
> arch/powerpc/platforms/8xx/cpm1.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/platforms/8xx/cpm1.c b/arch/powerpc/platforms/8xx/cpm1.c
> index 8ef1f4392086..6b828b9f90d9 100644
> --- a/arch/powerpc/platforms/8xx/cpm1.c
> +++ b/arch/powerpc/platforms/8xx/cpm1.c
> @@ -100,7 +100,7 @@ int cpm_command(u32 command, u8 opcode)
> int i, ret;
> unsigned long flags;
>
> - if (command & 0xffffff0f)
> + if (command & 0xffffff03)
> return -EINVAL;
>
> spin_lock_irqsave(&cmd_lock, flags);