2023-01-08 16:26:12

by Achal Verma

[permalink] [raw]
Subject: [PATCH v2 2/2] PCI: j721e: Add support to build pci-j721e as module.

Add support to build pci-j721e as module.

Signed-off-by: Achal Verma <[email protected]>
---
drivers/pci/controller/cadence/Kconfig | 10 +++++-----
drivers/pci/controller/cadence/pci-j721e.c | 6 +++++-
2 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/controller/cadence/Kconfig b/drivers/pci/controller/cadence/Kconfig
index 693c41fe32ce..51edf723586c 100644
--- a/drivers/pci/controller/cadence/Kconfig
+++ b/drivers/pci/controller/cadence/Kconfig
@@ -43,12 +43,13 @@ config PCIE_CADENCE_PLAT_EP
different vendors SoCs.

config PCI_J721E
- bool
+ tristate
+ select PCIE_CADENCE_HOST
+ select PCIE_CADENCE_EP

config PCI_J721E_HOST
- bool "TI J721E PCIe platform host controller"
+ tristate "TI J721E PCIe platform host controller"
depends on OF
- select PCIE_CADENCE_HOST
select PCI_J721E
help
Say Y here if you want to support the TI J721E PCIe platform
@@ -56,10 +57,9 @@ config PCI_J721E_HOST
core.

config PCI_J721E_EP
- bool "TI J721E PCIe platform endpoint controller"
+ tristate "TI J721E PCIe platform endpoint controller"
depends on OF
depends on PCI_ENDPOINT
- select PCIE_CADENCE_EP
select PCI_J721E
help
Say Y here if you want to support the TI J721E PCIe platform
diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
index cc83a8925ce0..c4017fa6ae61 100644
--- a/drivers/pci/controller/cadence/pci-j721e.c
+++ b/drivers/pci/controller/cadence/pci-j721e.c
@@ -13,6 +13,7 @@
#include <linux/irqchip/chained_irq.h>
#include <linux/irqdomain.h>
#include <linux/mfd/syscon.h>
+#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pci.h>
@@ -565,4 +566,7 @@ static struct platform_driver j721e_pcie_driver = {
.suppress_bind_attrs = true,
},
};
-builtin_platform_driver(j721e_pcie_driver);
+module_platform_driver(j721e_pcie_driver);
+
+MODULE_AUTHOR("Kishon Vijay Abraham I <[email protected]>");
+MODULE_LICENSE("GPL v2");
--
2.25.1


2023-01-08 18:35:56

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH v2 2/2] PCI: j721e: Add support to build pci-j721e as module.

Hi Achal,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on helgaas-pci/next]
[also build test ERROR on helgaas-pci/for-linus linus/master v6.2-rc2 next-20230106]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/Achal-Verma/PCI-cadence-Add-support-to-build-pcie-cadence-library-as-module/20230108-235956
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
patch link: https://lore.kernel.org/r/20230108155755.2614147-3-a-verma1%40ti.com
patch subject: [PATCH v2 2/2] PCI: j721e: Add support to build pci-j721e as module.
config: x86_64-randconfig-a011
compiler: gcc-11 (Debian 11.3.0-8) 11.3.0
reproduce (this is a W=1 build):
# https://github.com/intel-lab-lkp/linux/commit/eaa09469ae5267ac4229e8a2710fe11b342cc88c
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Achal-Verma/PCI-cadence-Add-support-to-build-pcie-cadence-library-as-module/20230108-235956
git checkout eaa09469ae5267ac4229e8a2710fe11b342cc88c
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=x86_64 olddefconfig
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <[email protected]>

All errors (new ones prefixed by >>):

ld: vmlinux.o: in function `cdns_pcie_ep_setup':
>> drivers/pci/controller/cadence/pcie-cadence-ep.c:680: undefined reference to `__devm_pci_epc_create'
>> ld: drivers/pci/controller/cadence/pcie-cadence-ep.c:715: undefined reference to `pci_epc_mem_init'
>> ld: drivers/pci/controller/cadence/pcie-cadence-ep.c:722: undefined reference to `pci_epc_mem_alloc_addr'
>> ld: drivers/pci/controller/cadence/pcie-cadence-ep.c:741: undefined reference to `pci_epc_mem_exit'

Kconfig warnings: (for reference only)
WARNING: unmet direct dependencies detected for PCIE_CADENCE_EP
Depends on [n]: PCI [=y] && OF [=y] && PCI_ENDPOINT [=n]
Selected by [y]:
- PCI_J721E [=y] && PCI [=y]


vim +680 drivers/pci/controller/cadence/pcie-cadence-ep.c

37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 639
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 640
bd22885aa188f1 drivers/pci/controller/pcie-cadence-ep.c Tom Joseph 2019-11-11 641 int cdns_pcie_ep_setup(struct cdns_pcie_ep *ep)
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 642 {
bd22885aa188f1 drivers/pci/controller/pcie-cadence-ep.c Tom Joseph 2019-11-11 643 struct device *dev = ep->pcie.dev;
bd22885aa188f1 drivers/pci/controller/pcie-cadence-ep.c Tom Joseph 2019-11-11 644 struct platform_device *pdev = to_platform_device(dev);
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 645 struct device_node *np = dev->of_node;
bd22885aa188f1 drivers/pci/controller/pcie-cadence-ep.c Tom Joseph 2019-11-11 646 struct cdns_pcie *pcie = &ep->pcie;
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 647 struct cdns_pcie_epf *epf;
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 648 struct resource *res;
bd22885aa188f1 drivers/pci/controller/pcie-cadence-ep.c Tom Joseph 2019-11-11 649 struct pci_epc *epc;
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 650 int ret;
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 651 int i;
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 652
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 653 pcie->is_rc = false;
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 654
e2dcd20b1645a7 drivers/pci/controller/cadence/pcie-cadence-ep.c Dejin Zheng 2020-06-03 655 pcie->reg_base = devm_platform_ioremap_resource_byname(pdev, "reg");
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 656 if (IS_ERR(pcie->reg_base)) {
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 657 dev_err(dev, "missing \"reg\"\n");
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 658 return PTR_ERR(pcie->reg_base);
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 659 }
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 660
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 661 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem");
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 662 if (!res) {
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 663 dev_err(dev, "missing \"mem\"\n");
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 664 return -EINVAL;
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 665 }
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 666 pcie->mem_res = res;
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 667
e87d17ca6af5ba drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2020-11-06 668 ep->max_regions = CDNS_PCIE_MAX_OB;
e87d17ca6af5ba drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2020-11-06 669 of_property_read_u32(np, "cdns,max-outbound-regions", &ep->max_regions);
e87d17ca6af5ba drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2020-11-06 670
a86854d0c599b3 drivers/pci/cadence/pcie-cadence-ep.c Kees Cook 2018-06-12 671 ep->ob_addr = devm_kcalloc(dev,
a86854d0c599b3 drivers/pci/cadence/pcie-cadence-ep.c Kees Cook 2018-06-12 672 ep->max_regions, sizeof(*ep->ob_addr),
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 673 GFP_KERNEL);
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 674 if (!ep->ob_addr)
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 675 return -ENOMEM;
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 676
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 677 /* Disable all but function 0 (anyway BIT(0) is hardwired to 1). */
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 678 cdns_pcie_writel(pcie, CDNS_PCIE_LM_EP_FUNC_CFG, BIT(0));
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 679
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 @680 epc = devm_pci_epc_create(dev, &cdns_pcie_epc_ops);
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 681 if (IS_ERR(epc)) {
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 682 dev_err(dev, "failed to create epc device\n");
19abcd790b51b2 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2020-07-22 683 return PTR_ERR(epc);
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 684 }
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 685
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 686 epc_set_drvdata(epc, ep);
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 687
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 688 if (of_property_read_u8(np, "max-functions", &epc->max_functions) < 0)
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 689 epc->max_functions = 1;
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 690
3ef5d16f50f8c3 drivers/pci/controller/cadence/pcie-cadence-ep.c Alan Douglas 2020-07-22 691 ep->epf = devm_kcalloc(dev, epc->max_functions, sizeof(*ep->epf),
3ef5d16f50f8c3 drivers/pci/controller/cadence/pcie-cadence-ep.c Alan Douglas 2020-07-22 692 GFP_KERNEL);
3ef5d16f50f8c3 drivers/pci/controller/cadence/pcie-cadence-ep.c Alan Douglas 2020-07-22 693 if (!ep->epf)
3ef5d16f50f8c3 drivers/pci/controller/cadence/pcie-cadence-ep.c Alan Douglas 2020-07-22 694 return -ENOMEM;
3ef5d16f50f8c3 drivers/pci/controller/cadence/pcie-cadence-ep.c Alan Douglas 2020-07-22 695
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 696 epc->max_vfs = devm_kcalloc(dev, epc->max_functions,
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 697 sizeof(*epc->max_vfs), GFP_KERNEL);
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 698 if (!epc->max_vfs)
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 699 return -ENOMEM;
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 700
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 701 ret = of_property_read_u8_array(np, "max-virtual-functions",
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 702 epc->max_vfs, epc->max_functions);
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 703 if (ret == 0) {
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 704 for (i = 0; i < epc->max_functions; i++) {
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 705 epf = &ep->epf[i];
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 706 if (epc->max_vfs[i] == 0)
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 707 continue;
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 708 epf->epf = devm_kcalloc(dev, epc->max_vfs[i],
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 709 sizeof(*ep->epf), GFP_KERNEL);
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 710 if (!epf->epf)
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 711 return -ENOMEM;
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 712 }
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 713 }
e19a0adf6e8bb0 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2021-08-19 714
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 @715 ret = pci_epc_mem_init(epc, pcie->mem_res->start,
975cf23e3aa895 drivers/pci/controller/cadence/pcie-cadence-ep.c Lad Prabhakar 2020-05-07 716 resource_size(pcie->mem_res), PAGE_SIZE);
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 717 if (ret < 0) {
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 718 dev_err(dev, "failed to initialize the memory space\n");
19abcd790b51b2 drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2020-07-22 719 return ret;
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 720 }
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 721
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 @722 ep->irq_cpu_addr = pci_epc_mem_alloc_addr(epc, &ep->irq_phys_addr,
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 723 SZ_128K);
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 724 if (!ep->irq_cpu_addr) {
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 725 dev_err(dev, "failed to reserve memory space for MSI\n");
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 726 ret = -ENOMEM;
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 727 goto free_epc_mem;
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 728 }
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 729 ep->irq_pci_addr = CDNS_PCIE_EP_IRQ_PCI_ADDR_NONE;
0652d4b6b56f73 drivers/pci/controller/pcie-cadence-ep.c Alan Douglas 2018-10-11 730 /* Reserve region 0 for IRQs */
0652d4b6b56f73 drivers/pci/controller/pcie-cadence-ep.c Alan Douglas 2018-10-11 731 set_bit(0, &ep->ob_region_map);
09c24094b2e3a1 drivers/pci/controller/cadence/pcie-cadence-ep.c Nadeem Athani 2021-08-11 732
09c24094b2e3a1 drivers/pci/controller/cadence/pcie-cadence-ep.c Nadeem Athani 2021-08-11 733 if (ep->quirk_detect_quiet_flag)
09c24094b2e3a1 drivers/pci/controller/cadence/pcie-cadence-ep.c Nadeem Athani 2021-08-11 734 cdns_pcie_detect_quiet_min_delay_set(&ep->pcie);
09c24094b2e3a1 drivers/pci/controller/cadence/pcie-cadence-ep.c Nadeem Athani 2021-08-11 735
a8b661eb50abaa drivers/pci/controller/cadence/pcie-cadence-ep.c Kishon Vijay Abraham I 2020-07-22 736 spin_lock_init(&ep->lock);
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 737
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 738 return 0;
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 739
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 740 free_epc_mem:
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 @741 pci_epc_mem_exit(epc);
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 742
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 743 return ret;
37dddf14f1aecd drivers/pci/cadence/pcie-cadence-ep.c Cyrille Pitchen 2018-01-30 744 }
8f4fb316406e48 drivers/pci/controller/cadence/pcie-cadence-ep.c Achal Verma 2023-01-08 745 EXPORT_SYMBOL_GPL(cdns_pcie_ep_setup);
8f4fb316406e48 drivers/pci/controller/cadence/pcie-cadence-ep.c Achal Verma 2023-01-08 746

--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests


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2023-01-08 19:03:37

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH v2 2/2] PCI: j721e: Add support to build pci-j721e as module.

Hi Achal,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on helgaas-pci/next]
[also build test ERROR on helgaas-pci/for-linus linus/master v6.2-rc2 next-20230106]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/Achal-Verma/PCI-cadence-Add-support-to-build-pcie-cadence-library-as-module/20230108-235956
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
patch link: https://lore.kernel.org/r/20230108155755.2614147-3-a-verma1%40ti.com
patch subject: [PATCH v2 2/2] PCI: j721e: Add support to build pci-j721e as module.
config: x86_64-randconfig-a012
compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project f28c006a5895fc0e329fe15fead81e37457cb1d1)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/eaa09469ae5267ac4229e8a2710fe11b342cc88c
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Achal-Verma/PCI-cadence-Add-support-to-build-pcie-cadence-library-as-module/20230108-235956
git checkout eaa09469ae5267ac4229e8a2710fe11b342cc88c
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=x86_64 olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <[email protected]>

All errors (new ones prefixed by >>):

>> ld.lld: error: undefined symbol: __devm_pci_epc_create
>>> referenced by pcie-cadence-ep.c:680 (drivers/pci/controller/cadence/pcie-cadence-ep.c:680)
>>> vmlinux.o:(cdns_pcie_ep_setup)
--
>> ld.lld: error: undefined symbol: pci_epc_mem_init
>>> referenced by pcie-cadence-ep.c:715 (drivers/pci/controller/cadence/pcie-cadence-ep.c:715)
>>> vmlinux.o:(cdns_pcie_ep_setup)
--
>> ld.lld: error: undefined symbol: pci_epc_mem_alloc_addr
>>> referenced by pcie-cadence-ep.c:722 (drivers/pci/controller/cadence/pcie-cadence-ep.c:722)
>>> vmlinux.o:(cdns_pcie_ep_setup)
--
>> ld.lld: error: undefined symbol: pci_epc_mem_exit
>>> referenced by pcie-cadence-ep.c:741 (drivers/pci/controller/cadence/pcie-cadence-ep.c:741)
>>> vmlinux.o:(cdns_pcie_ep_setup)

Kconfig warnings: (for reference only)
WARNING: unmet direct dependencies detected for PCIE_CADENCE_EP
Depends on [n]: PCI [=y] && OF [=y] && PCI_ENDPOINT [=n]
Selected by [y]:
- PCI_J721E [=y] && PCI [=y]

--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests


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config (169.00 kB)
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2023-01-08 19:22:58

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH v2 2/2] PCI: j721e: Add support to build pci-j721e as module.

Hi Achal,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on helgaas-pci/next]
[also build test ERROR on helgaas-pci/for-linus linus/master next-20230106]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/Achal-Verma/PCI-cadence-Add-support-to-build-pcie-cadence-library-as-module/20230108-235956
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
patch link: https://lore.kernel.org/r/20230108155755.2614147-3-a-verma1%40ti.com
patch subject: [PATCH v2 2/2] PCI: j721e: Add support to build pci-j721e as module.
config: ia64-randconfig-r013-20230108
compiler: ia64-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/eaa09469ae5267ac4229e8a2710fe11b342cc88c
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Achal-Verma/PCI-cadence-Add-support-to-build-pcie-cadence-library-as-module/20230108-235956
git checkout eaa09469ae5267ac4229e8a2710fe11b342cc88c
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=ia64 olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=ia64 SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <[email protected]>

All errors (new ones prefixed by >>):

ia64-linux-ld: drivers/pci/controller/cadence/pcie-cadence-ep.o: in function `cdns_pcie_ep_setup':
drivers/pci/controller/cadence/pcie-cadence-ep.c:680: undefined reference to `__devm_pci_epc_create'
>> ia64-linux-ld: drivers/pci/controller/cadence/pcie-cadence-ep.c:715: undefined reference to `pci_epc_mem_init'
>> ia64-linux-ld: drivers/pci/controller/cadence/pcie-cadence-ep.c:722: undefined reference to `pci_epc_mem_alloc_addr'
>> ia64-linux-ld: drivers/pci/controller/cadence/pcie-cadence-ep.c:741: undefined reference to `pci_epc_mem_exit'

Kconfig warnings: (for reference only)
WARNING: unmet direct dependencies detected for PCIE_CADENCE_EP
Depends on [n]: PCI [=y] && OF [=y] && PCI_ENDPOINT [=n]
Selected by [y]:
- PCI_J721E [=y] && PCI [=y]

--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests


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2023-01-09 04:45:41

by Vignesh Raghavendra

[permalink] [raw]
Subject: Re: [PATCH v2 2/2] PCI: j721e: Add support to build pci-j721e as module.

Hi Achal,

On 08/01/23 21:27, Achal Verma wrote:
> Add support to build pci-j721e as module.
>
> Signed-off-by: Achal Verma <[email protected]>
> ---
> drivers/pci/controller/cadence/Kconfig | 10 +++++-----
> drivers/pci/controller/cadence/pci-j721e.c | 6 +++++-
> 2 files changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pci/controller/cadence/Kconfig b/drivers/pci/controller/cadence/Kconfig
> index 693c41fe32ce..51edf723586c 100644
> --- a/drivers/pci/controller/cadence/Kconfig
> +++ b/drivers/pci/controller/cadence/Kconfig
> @@ -43,12 +43,13 @@ config PCIE_CADENCE_PLAT_EP
> different vendors SoCs.
>
> config PCI_J721E
> - bool
> + tristate
> + select PCIE_CADENCE_HOST
> + select PCIE_CADENCE_EP
>

Please don't use select when symbol being selected, depends on
additional configs

Documentation/kbuild/kconfig-language.rst::

select should be used with care. select will force
a symbol to a value without visiting the dependencies.
By abusing select you are able to select a symbol FOO even
if FOO depends on BAR that is not set.


> config PCI_J721E_HOST
> - bool "TI J721E PCIe platform host controller"
> + tristate "TI J721E PCIe platform host controller"
> depends on OF
> - select PCIE_CADENCE_HOST
> select PCI_J721E
> help
> Say Y here if you want to support the TI J721E PCIe platform
> @@ -56,10 +57,9 @@ config PCI_J721E_HOST
> core.
>
> config PCI_J721E_EP
> - bool "TI J721E PCIe platform endpoint controller"
> + tristate "TI J721E PCIe platform endpoint controller"
> depends on OF
> depends on PCI_ENDPOINT
> - select PCIE_CADENCE_EP
> select PCI_J721E
> help
> Say Y here if you want to support the TI J721E PCIe platform
> diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
> index cc83a8925ce0..c4017fa6ae61 100644
> --- a/drivers/pci/controller/cadence/pci-j721e.c
> +++ b/drivers/pci/controller/cadence/pci-j721e.c
> @@ -13,6 +13,7 @@
> #include <linux/irqchip/chained_irq.h>
> #include <linux/irqdomain.h>
> #include <linux/mfd/syscon.h>
> +#include <linux/module.h>
> #include <linux/of.h>
> #include <linux/of_device.h>
> #include <linux/pci.h>
> @@ -565,4 +566,7 @@ static struct platform_driver j721e_pcie_driver = {
> .suppress_bind_attrs = true,
> },
> };
> -builtin_platform_driver(j721e_pcie_driver);
> +module_platform_driver(j721e_pcie_driver);
> +
> +MODULE_AUTHOR("Kishon Vijay Abraham I <[email protected]>");
> +MODULE_LICENSE("GPL v2");

--
Regards
Vignesh

2023-01-09 16:17:54

by Vignesh Raghavendra

[permalink] [raw]
Subject: Re: [PATCH v2 2/2] PCI: j721e: Add support to build pci-j721e as module.



On 09/01/23 6:05 pm, Achal Verma wrote:
> Discussed with Vignesh the current config dependency of pcie-cadence and pci-j721e modules,
> it seems like for now to modularize these drivers with minimal changes is to use "select"
> as they were used before in PCI_J721E_HOST and PCI_J721E_EP config options.
>

With this patch its now impossible to build PCI_J721E_HOST without
pcie endpoint support (as PCI_ENDPOINT is now a dependency). I don't
know a way to achieve this via Kconfig magic w/o splitting pci-j721e.c
into EP/RC (like pcie-rcar* or pcie-rockchip*)


> Will push updated version with "depends on PCI_ENDPOINT" in PCI_J721E config to check
> dependency on PCI_ENDPOINT before selecting PCIE_CADENCE_EP.
>

Please don't top post and respond inline:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

Regards
Vignesh

[...]

2023-01-10 16:35:11

by Bjorn Helgaas

[permalink] [raw]
Subject: Re: [PATCH v2 2/2] PCI: j721e: Add support to build pci-j721e as module.

On Mon, Jan 09, 2023 at 09:06:14PM +0530, Vignesh Raghavendra wrote:
> On 09/01/23 6:05 pm, Achal Verma wrote:
> > Discussed with Vignesh the current config dependency of pcie-cadence and pci-j721e modules,
> > it seems like for now to modularize these drivers with minimal changes is to use "select"
> > as they were used before in PCI_J721E_HOST and PCI_J721E_EP config options.
>
> With this patch its now impossible to build PCI_J721E_HOST without
> pcie endpoint support (as PCI_ENDPOINT is now a dependency). I don't
> know a way to achieve this via Kconfig magic w/o splitting pci-j721e.c
> into EP/RC (like pcie-rcar* or pcie-rockchip*)
>
> > Will push updated version with "depends on PCI_ENDPOINT" in PCI_J721E config to check
> > dependency on PCI_ENDPOINT before selecting PCIE_CADENCE_EP.
> >
>
> Please don't top post and respond inline:
> https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

Apparently there was also email from Achal to Vignesh that didn't make
it to the archives, probably because it was HTML or other "fancy"
email. See the thread overview here, which is missing something:
https://lore.kernel.org/all/[email protected]/

It's best to use plain text email when possible. See
http://vger.kernel.org/majordomo-info.html for details.

Bjorn