2023-01-13 03:48:11

by Clark Wang

Subject: [PATCH V2 4/7] arm64: dts: imx93: add eqos support

Add EQoS node for imx93 platform.

Signed-off-by: Clark Wang <[email protected]>
---
New patch added in V2, split dtsi and dts changes into separate patches
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 6808321ed809..ff2253cb7d4a 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -564,6 +564,28 @@ usdhc2: mmc@42860000 {
status = "disabled";
};

+ eqos: ethernet@428a0000 {
+ compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";
+ reg = <0x428a0000 0x10000>;
+ interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eth_wake_irq", "macirq";
+ clocks = <&clk IMX93_CLK_ENET_QOS_GATE>,
+ <&clk IMX93_CLK_ENET_QOS_GATE>,
+ <&clk IMX93_CLK_ENET_TIMER2>,
+ <&clk IMX93_CLK_ENET>,
+ <&clk IMX93_CLK_ENET_QOS_GATE>;
+ clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";
+ assigned-clocks = <&clk IMX93_CLK_ENET_TIMER2>,
+ <&clk IMX93_CLK_ENET>;
+ assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
+ <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>;
+ assigned-clock-rates = <100000000>, <250000000>;
+ intf_mode = <&wakeupmix_gpr 0x28>;
+ clk_csr = <0>;
+ status = "disabled";
+ };
+
usdhc3: mmc@428b0000 {
compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
reg = <0x428b0000 0x10000>;
--
2.34.1

2023-01-16 01:02:48

by Peng Fan (OSS)

Subject: Re: [PATCH V2 4/7] arm64: dts: imx93: add eqos support

On 1/13/2023 11:33 AM, Clark Wang wrote:
> Add EQoS node for imx93 platform.
>
> Signed-off-by: Clark Wang <[email protected]>

Reviewed-by: Peng Fan <[email protected]>

> ---
> New patch added in V2, split dtsi and dts changes into separate patches
> ---
> arch/arm64/boot/dts/freescale/imx93.dtsi | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
> index 6808321ed809..ff2253cb7d4a 100644
> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> @@ -564,6 +564,28 @@ usdhc2: mmc@42860000 {
> status = "disabled";
> };
>
> + eqos: ethernet@428a0000 {
> + compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";
> + reg = <0x428a0000 0x10000>;
> + interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "eth_wake_irq", "macirq";
> + clocks = <&clk IMX93_CLK_ENET_QOS_GATE>,
> + <&clk IMX93_CLK_ENET_QOS_GATE>,
> + <&clk IMX93_CLK_ENET_TIMER2>,
> + <&clk IMX93_CLK_ENET>,
> + <&clk IMX93_CLK_ENET_QOS_GATE>;
> + clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";
> + assigned-clocks = <&clk IMX93_CLK_ENET_TIMER2>,
> + <&clk IMX93_CLK_ENET>;
> + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
> + <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>;
> + assigned-clock-rates = <100000000>, <250000000>;
> + intf_mode = <&wakeupmix_gpr 0x28>;
> + clk_csr = <0>;
> + status = "disabled";
> + };
> +
> usdhc3: mmc@428b0000 {
> compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
> reg = <0x428b0000 0x10000>;