Changes since v4:
- Rebase on linux-next.
- Remove MMSYS fallback compatible.
- Migrate MT8195 VPPSYS0/1 from clock to mtk-mmsys driver.
Changes since v3:
- Rebase on linux-next.
Changes since v2:
- Depend on :
[1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
- Split dts settings into two patches based on belonging to MMSYS or MUTEX.
Changes since v1:
- Depend on :
[1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
- Add compatible names to VPPSYS0 and VPPSYS1 in MMSYS binding file.
- Fix VPPSYS's MMSYS and MUTEX dts to pass the dtsb_check.
- Rename mtk_mmsys_merge_config() and mtk_mmsys_rsz_dcm_config() to
mtk_mmsys_vpp_rsz_merge_config() and mtk_mmsys_vpp_rsz_dcm_config().
- Clean up mtk_mmsys_vpp_rsz_dcm_config().
- Add a comment to mtk_mutex_write_mod() and clean it up for use in more
than 32 mods.
Hi,
This series add support for MT8195's two VPPSYS(Video Processor Pipe Subsystem),
under which there will be corresponding MMSYS and MUTEX settings that
need to be configured.
Moudy Ho (4):
dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 to mtk-mmsys
driver
dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
arm64: dts: mediatek: mt8195: add MUTEX configuration for VPPSYS
clk: mediatek: remove MT8195 vppsys/0/1 simple_probe
Roy-CW.Yeh (6):
dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS
arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS
soc: mediatek: mmsys: add support for MT8195 VPPSYS
soc: mediatek: mmsys: add config api for RSZ switching and DCM
soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1
soc: mediatek: mutex: support MT8195 VPPSYS
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 2 +
.../arm/mediatek/mediatek,mt8195-clock.yaml | 16 ---
.../bindings/soc/mediatek/mediatek,mutex.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 26 +++-
drivers/clk/mediatek/clk-mt8195-vpp0.c | 58 ++++++--
drivers/clk/mediatek/clk-mt8195-vpp1.c | 58 ++++++--
drivers/soc/mediatek/mt8195-mmsys.h | 13 ++
drivers/soc/mediatek/mtk-mmsys.c | 64 +++++++++
drivers/soc/mediatek/mtk-mmsys.h | 1 +
drivers/soc/mediatek/mtk-mutex.c | 135 +++++++++++++++++-
include/linux/soc/mediatek/mtk-mmsys.h | 4 +
include/linux/soc/mediatek/mtk-mutex.h | 35 +++++
12 files changed, 356 insertions(+), 57 deletions(-)
--
2.18.0
In MT8195, the MMSYS has two Video Processor Pipepline Subsystems
named VPPSYS0 and VPPSYS1, each with specific MUTEX to control
Start of Frame(SOF) and End of Frame (EOF) signals.
Before working with them, the addresses, interrupts, clocks and power
domains need to be set up in dts.
Signed-off-by: Moudy Ho <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 8bc38700b945..206dd534c3f6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1706,6 +1706,15 @@
#clock-cells = <1>;
};
+ mutex@1400f000 {
+ compatible = "mediatek,mt8195-vpp-mutex";
+ reg = <0 0x1400f000 0 0x1000>;
+ interrupts = <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH 0>;
+ mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xf000 0x1000>;
+ clocks = <&vppsys0 CLK_VPP0_MUTEX>;
+ power-domains = <&spm MT8195_POWER_DOMAIN_VPPSYS0>;
+ };
+
smi_sub_common_vpp0_vpp1_2x1: smi@14010000 {
compatible = "mediatek,mt8195-smi-sub-common";
reg = <0 0x14010000 0 0x1000>;
@@ -1811,6 +1820,15 @@
#clock-cells = <1>;
};
+ mutex@14f01000 {
+ compatible = "mediatek,mt8195-vpp-mutex";
+ reg = <0 0x14f01000 0 0x1000>;
+ interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
+ mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x1000 0x1000>;
+ clocks = <&vppsys1 CLK_VPP1_DISP_MUTEX>;
+ power-domains = <&spm MT8195_POWER_DOMAIN_VPPSYS1>;
+ };
+
larb5: larb@14f02000 {
compatible = "mediatek,mt8195-smi-larb";
reg = <0 0x14f02000 0 0x1000>;
--
2.18.0
MT8195 VPPSYS0/1 will be probed by the compatible name in
the mtk-mmsys driver and then probe its own clock driver as
a platform driver.
Signed-off-by: Moudy Ho <[email protected]>
---
drivers/clk/mediatek/clk-mt8195-vpp0.c | 58 +++++++++++++++++++-------
drivers/clk/mediatek/clk-mt8195-vpp1.c | 58 +++++++++++++++++++-------
2 files changed, 86 insertions(+), 30 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c b/drivers/clk/mediatek/clk-mt8195-vpp0.c
index bf2939c3a023..6d5800f69f6c 100644
--- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
+++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
@@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC, "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
};
-static const struct mtk_clk_desc vpp0_desc = {
- .clks = vpp0_clks,
- .num_clks = ARRAY_SIZE(vpp0_clks),
-};
+static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *node = dev->parent->of_node;
+ struct clk_onecell_data *clk_data;
+ int r;
-static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
- {
- .compatible = "mediatek,mt8195-vppsys0",
- .data = &vpp0_desc,
- }, {
- /* sentinel */
- }
-};
+ clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
+ if (!clk_data)
+ return -ENOMEM;
+
+ r = mtk_clk_register_gates(node, vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
+ if (r)
+ goto free_vpp0_data;
+
+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+ if (r)
+ goto unregister_gates;
+
+ platform_set_drvdata(pdev, clk_data);
+
+ return r;
+
+unregister_gates:
+ mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
+free_vpp0_data:
+ mtk_free_clk_data(clk_data);
+ return r;
+}
+
+static int clk_mt8195_vpp0_remove(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *node = dev->parent->of_node;
+ struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
+
+ of_clk_del_provider(node);
+ mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
+ mtk_free_clk_data(clk_data);
+
+ return 0;
+}
static struct platform_driver clk_mt8195_vpp0_drv = {
- .probe = mtk_clk_simple_probe,
- .remove = mtk_clk_simple_remove,
+ .probe = clk_mt8195_vpp0_probe,
+ .remove = clk_mt8195_vpp0_remove,
.driver = {
.name = "clk-mt8195-vpp0",
- .of_match_table = of_match_clk_mt8195_vpp0,
},
};
builtin_platform_driver(clk_mt8195_vpp0_drv);
diff --git a/drivers/clk/mediatek/clk-mt8195-vpp1.c b/drivers/clk/mediatek/clk-mt8195-vpp1.c
index ffd52c762890..3b88c69e96c9 100644
--- a/drivers/clk/mediatek/clk-mt8195-vpp1.c
+++ b/drivers/clk/mediatek/clk-mt8195-vpp1.c
@@ -84,26 +84,54 @@ static const struct mtk_gate vpp1_clks[] = {
GATE_VPP1_1(CLK_VPP1_VPP_SPLIT_26M, "vpp1_vpp_split_26m", "clk26m", 26),
};
-static const struct mtk_clk_desc vpp1_desc = {
- .clks = vpp1_clks,
- .num_clks = ARRAY_SIZE(vpp1_clks),
-};
+static int clk_mt8195_vpp1_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *node = dev->parent->of_node;
+ struct clk_onecell_data *clk_data;
+ int r;
-static const struct of_device_id of_match_clk_mt8195_vpp1[] = {
- {
- .compatible = "mediatek,mt8195-vppsys1",
- .data = &vpp1_desc,
- }, {
- /* sentinel */
- }
-};
+ clk_data = mtk_alloc_clk_data(CLK_VPP1_NR_CLK);
+ if (!clk_data)
+ return -ENOMEM;
+
+ r = mtk_clk_register_gates(node, vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
+ if (r)
+ goto free_vpp1_data;
+
+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+ if (r)
+ goto unregister_gates;
+
+ platform_set_drvdata(pdev, clk_data);
+
+ return r;
+
+unregister_gates:
+ mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
+free_vpp1_data:
+ mtk_free_clk_data(clk_data);
+ return r;
+}
+
+static int clk_mt8195_vpp1_remove(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *node = dev->parent->of_node;
+ struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
+
+ of_clk_del_provider(node);
+ mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
+ mtk_free_clk_data(clk_data);
+
+ return 0;
+}
static struct platform_driver clk_mt8195_vpp1_drv = {
- .probe = mtk_clk_simple_probe,
- .remove = mtk_clk_simple_remove,
+ .probe = clk_mt8195_vpp1_probe,
+ .remove = clk_mt8195_vpp1_remove,
.driver = {
.name = "clk-mt8195-vpp1",
- .of_match_table = of_match_clk_mt8195_vpp1,
},
};
builtin_platform_driver(clk_mt8195_vpp1_drv);
--
2.18.0