Change since v5:
- Rebase on linux-next.
- Correct the compatible enumeration order in "mediatek,mmsys.yaml".
Hi,
This series splits patches from the original mailing list below:
https://patchwork.kernel.org/project/linux-mediatek/list/?series=711592
Refer to the comments of 0/8 and 1/8 in the following series:
https://patchwork.kernel.org/project/linux-mediatek/list/?series=702518
All about the MT8195 VPPSYS 0/1 should be probed from the "mtk-mmsys"
driver, which then starts its own clock driver as the platform driver.
Moudy Ho (3):
dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 to mtk-mmsys
driver
dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
clk: mediatek: remove MT8195 vppsys/0/1 simple_probe
Roy-CW.Yeh (1):
soc: mediatek: mmsys: add support for MT8195 VPPSYS
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 2 +
.../arm/mediatek/mediatek,mt8195-clock.yaml | 16 -----
drivers/clk/mediatek/clk-mt8195-vpp0.c | 58 ++++++++++++++-----
drivers/clk/mediatek/clk-mt8195-vpp1.c | 58 ++++++++++++++-----
drivers/soc/mediatek/mtk-mmsys.c | 22 +++++++
drivers/soc/mediatek/mtk-mmsys.h | 1 +
6 files changed, 111 insertions(+), 46 deletions(-)
--
2.18.0
For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
hardware differences in power domains, clocks and subsystem counts,
which should be determined by compatible names.
Signed-off-by: Moudy Ho <[email protected]>
---
.../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index 84de12709323..b08ae7405b1a 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -33,6 +33,8 @@ properties:
- mediatek,mt8186-mmsys
- mediatek,mt8188-vdosys0
- mediatek,mt8192-mmsys
+ - mediatek,mt8195-vppsys0
+ - mediatek,mt8195-vppsys1
- mediatek,mt8365-mmsys
- const: syscon
--
2.18.0
MT8195 VPPSYS0/1 will be probed by the compatible name in
the mtk-mmsys driver and then probe its own clock driver as
a platform driver.
Signed-off-by: Moudy Ho <[email protected]>
---
drivers/clk/mediatek/clk-mt8195-vpp0.c | 58 +++++++++++++++++++-------
drivers/clk/mediatek/clk-mt8195-vpp1.c | 58 +++++++++++++++++++-------
2 files changed, 86 insertions(+), 30 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c b/drivers/clk/mediatek/clk-mt8195-vpp0.c
index bf2939c3a023..6d5800f69f6c 100644
--- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
+++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
@@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC, "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
};
-static const struct mtk_clk_desc vpp0_desc = {
- .clks = vpp0_clks,
- .num_clks = ARRAY_SIZE(vpp0_clks),
-};
+static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *node = dev->parent->of_node;
+ struct clk_onecell_data *clk_data;
+ int r;
-static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
- {
- .compatible = "mediatek,mt8195-vppsys0",
- .data = &vpp0_desc,
- }, {
- /* sentinel */
- }
-};
+ clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
+ if (!clk_data)
+ return -ENOMEM;
+
+ r = mtk_clk_register_gates(node, vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
+ if (r)
+ goto free_vpp0_data;
+
+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+ if (r)
+ goto unregister_gates;
+
+ platform_set_drvdata(pdev, clk_data);
+
+ return r;
+
+unregister_gates:
+ mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
+free_vpp0_data:
+ mtk_free_clk_data(clk_data);
+ return r;
+}
+
+static int clk_mt8195_vpp0_remove(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *node = dev->parent->of_node;
+ struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
+
+ of_clk_del_provider(node);
+ mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
+ mtk_free_clk_data(clk_data);
+
+ return 0;
+}
static struct platform_driver clk_mt8195_vpp0_drv = {
- .probe = mtk_clk_simple_probe,
- .remove = mtk_clk_simple_remove,
+ .probe = clk_mt8195_vpp0_probe,
+ .remove = clk_mt8195_vpp0_remove,
.driver = {
.name = "clk-mt8195-vpp0",
- .of_match_table = of_match_clk_mt8195_vpp0,
},
};
builtin_platform_driver(clk_mt8195_vpp0_drv);
diff --git a/drivers/clk/mediatek/clk-mt8195-vpp1.c b/drivers/clk/mediatek/clk-mt8195-vpp1.c
index ffd52c762890..3b88c69e96c9 100644
--- a/drivers/clk/mediatek/clk-mt8195-vpp1.c
+++ b/drivers/clk/mediatek/clk-mt8195-vpp1.c
@@ -84,26 +84,54 @@ static const struct mtk_gate vpp1_clks[] = {
GATE_VPP1_1(CLK_VPP1_VPP_SPLIT_26M, "vpp1_vpp_split_26m", "clk26m", 26),
};
-static const struct mtk_clk_desc vpp1_desc = {
- .clks = vpp1_clks,
- .num_clks = ARRAY_SIZE(vpp1_clks),
-};
+static int clk_mt8195_vpp1_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *node = dev->parent->of_node;
+ struct clk_onecell_data *clk_data;
+ int r;
-static const struct of_device_id of_match_clk_mt8195_vpp1[] = {
- {
- .compatible = "mediatek,mt8195-vppsys1",
- .data = &vpp1_desc,
- }, {
- /* sentinel */
- }
-};
+ clk_data = mtk_alloc_clk_data(CLK_VPP1_NR_CLK);
+ if (!clk_data)
+ return -ENOMEM;
+
+ r = mtk_clk_register_gates(node, vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
+ if (r)
+ goto free_vpp1_data;
+
+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+ if (r)
+ goto unregister_gates;
+
+ platform_set_drvdata(pdev, clk_data);
+
+ return r;
+
+unregister_gates:
+ mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
+free_vpp1_data:
+ mtk_free_clk_data(clk_data);
+ return r;
+}
+
+static int clk_mt8195_vpp1_remove(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *node = dev->parent->of_node;
+ struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
+
+ of_clk_del_provider(node);
+ mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
+ mtk_free_clk_data(clk_data);
+
+ return 0;
+}
static struct platform_driver clk_mt8195_vpp1_drv = {
- .probe = mtk_clk_simple_probe,
- .remove = mtk_clk_simple_remove,
+ .probe = clk_mt8195_vpp1_probe,
+ .remove = clk_mt8195_vpp1_remove,
.driver = {
.name = "clk-mt8195-vpp1",
- .of_match_table = of_match_clk_mt8195_vpp1,
},
};
builtin_platform_driver(clk_mt8195_vpp1_drv);
--
2.18.0
On Wed, 18 Jan 2023 11:15:07 +0800, Moudy Ho wrote:
> For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
> hardware differences in power domains, clocks and subsystem counts,
> which should be determined by compatible names.
>
> Signed-off-by: Moudy Ho <[email protected]>
> ---
> .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Please add Acked-by/Reviewed-by tags when posting new versions. However,
there's no need to repost patches *only* to add the tags. The upstream
maintainer will do that for acks received on the version they apply.
If a tag was not added on purpose, please state why and what changed.
Missing tags:
Acked-by: Krzysztof Kozlowski <[email protected]>
On 18/01/2023 04:15, Moudy Ho wrote:
> MT8195 VPPSYS0/1 will be probed by the compatible name in
> the mtk-mmsys driver and then probe its own clock driver as
> a platform driver.
>
> Signed-off-by: Moudy Ho <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
> ---
> drivers/clk/mediatek/clk-mt8195-vpp0.c | 58 +++++++++++++++++++-------
> drivers/clk/mediatek/clk-mt8195-vpp1.c | 58 +++++++++++++++++++-------
> 2 files changed, 86 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> index bf2939c3a023..6d5800f69f6c 100644
> --- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> +++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> @@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
> GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC, "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
> };
>
> -static const struct mtk_clk_desc vpp0_desc = {
> - .clks = vpp0_clks,
> - .num_clks = ARRAY_SIZE(vpp0_clks),
> -};
> +static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *node = dev->parent->of_node;
> + struct clk_onecell_data *clk_data;
> + int r;
>
> -static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
> - {
> - .compatible = "mediatek,mt8195-vppsys0",
> - .data = &vpp0_desc,
> - }, {
> - /* sentinel */
> - }
> -};
> + clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
> + if (!clk_data)
> + return -ENOMEM;
> +
> + r = mtk_clk_register_gates(node, vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
> + if (r)
> + goto free_vpp0_data;
> +
> + r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
> + if (r)
> + goto unregister_gates;
> +
> + platform_set_drvdata(pdev, clk_data);
> +
> + return r;
> +
> +unregister_gates:
> + mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
> +free_vpp0_data:
> + mtk_free_clk_data(clk_data);
> + return r;
> +}
> +
> +static int clk_mt8195_vpp0_remove(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *node = dev->parent->of_node;
> + struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
> +
> + of_clk_del_provider(node);
> + mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
> + mtk_free_clk_data(clk_data);
> +
> + return 0;
> +}
>
> static struct platform_driver clk_mt8195_vpp0_drv = {
> - .probe = mtk_clk_simple_probe,
> - .remove = mtk_clk_simple_remove,
> + .probe = clk_mt8195_vpp0_probe,
> + .remove = clk_mt8195_vpp0_remove,
> .driver = {
> .name = "clk-mt8195-vpp0",
> - .of_match_table = of_match_clk_mt8195_vpp0,
> },
> };
> builtin_platform_driver(clk_mt8195_vpp0_drv);
> diff --git a/drivers/clk/mediatek/clk-mt8195-vpp1.c b/drivers/clk/mediatek/clk-mt8195-vpp1.c
> index ffd52c762890..3b88c69e96c9 100644
> --- a/drivers/clk/mediatek/clk-mt8195-vpp1.c
> +++ b/drivers/clk/mediatek/clk-mt8195-vpp1.c
> @@ -84,26 +84,54 @@ static const struct mtk_gate vpp1_clks[] = {
> GATE_VPP1_1(CLK_VPP1_VPP_SPLIT_26M, "vpp1_vpp_split_26m", "clk26m", 26),
> };
>
> -static const struct mtk_clk_desc vpp1_desc = {
> - .clks = vpp1_clks,
> - .num_clks = ARRAY_SIZE(vpp1_clks),
> -};
> +static int clk_mt8195_vpp1_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *node = dev->parent->of_node;
> + struct clk_onecell_data *clk_data;
> + int r;
>
> -static const struct of_device_id of_match_clk_mt8195_vpp1[] = {
> - {
> - .compatible = "mediatek,mt8195-vppsys1",
> - .data = &vpp1_desc,
> - }, {
> - /* sentinel */
> - }
> -};
> + clk_data = mtk_alloc_clk_data(CLK_VPP1_NR_CLK);
> + if (!clk_data)
> + return -ENOMEM;
> +
> + r = mtk_clk_register_gates(node, vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
> + if (r)
> + goto free_vpp1_data;
> +
> + r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
> + if (r)
> + goto unregister_gates;
> +
> + platform_set_drvdata(pdev, clk_data);
> +
> + return r;
> +
> +unregister_gates:
> + mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
> +free_vpp1_data:
> + mtk_free_clk_data(clk_data);
> + return r;
> +}
> +
> +static int clk_mt8195_vpp1_remove(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *node = dev->parent->of_node;
> + struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
> +
> + of_clk_del_provider(node);
> + mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
> + mtk_free_clk_data(clk_data);
> +
> + return 0;
> +}
>
> static struct platform_driver clk_mt8195_vpp1_drv = {
> - .probe = mtk_clk_simple_probe,
> - .remove = mtk_clk_simple_remove,
> + .probe = clk_mt8195_vpp1_probe,
> + .remove = clk_mt8195_vpp1_remove,
> .driver = {
> .name = "clk-mt8195-vpp1",
> - .of_match_table = of_match_clk_mt8195_vpp1,
> },
> };
> builtin_platform_driver(clk_mt8195_vpp1_drv);
Quoting Moudy Ho (2023-01-17 19:15:08)
> MT8195 VPPSYS0/1 will be probed by the compatible name in
> the mtk-mmsys driver and then probe its own clock driver as
> a platform driver.
>
> Signed-off-by: Moudy Ho <[email protected]>
> ---
Applied to clk-next
On 18/01/2023 04:15, Moudy Ho wrote:
> For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
> hardware differences in power domains, clocks and subsystem counts,
> which should be determined by compatible names.
>
> Signed-off-by: Moudy Ho <[email protected]>
Applied, thanks!
> ---
> .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> index 84de12709323..b08ae7405b1a 100644
> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> @@ -33,6 +33,8 @@ properties:
> - mediatek,mt8186-mmsys
> - mediatek,mt8188-vdosys0
> - mediatek,mt8192-mmsys
> + - mediatek,mt8195-vppsys0
> + - mediatek,mt8195-vppsys1
> - mediatek,mt8365-mmsys
> - const: syscon
>
Quoting Moudy Ho (2023-01-17 19:15:08)
> diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> index bf2939c3a023..6d5800f69f6c 100644
> --- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> +++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> @@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
> GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC, "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
> };
>
> -static const struct mtk_clk_desc vpp0_desc = {
> - .clks = vpp0_clks,
> - .num_clks = ARRAY_SIZE(vpp0_clks),
> -};
> +static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *node = dev->parent->of_node;
> + struct clk_onecell_data *clk_data;
> + int r;
>
> -static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
> - {
> - .compatible = "mediatek,mt8195-vppsys0",
> - .data = &vpp0_desc,
> - }, {
> - /* sentinel */
> - }
> -};
> + clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
> + if (!clk_data)
> + return -ENOMEM;
> +
> + r = mtk_clk_register_gates(node, vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
This API is wrecked by a patch from AngeloGioacchino. Can you resend, or
tell me which device should be used here?
On Mon, 2023-01-30 at 11:36 -0800, Stephen Boyd wrote:
> Quoting Moudy Ho (2023-01-17 19:15:08)
> > diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > index bf2939c3a023..6d5800f69f6c 100644
> > --- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > +++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > @@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
> > GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC,
> > "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
> > };
> >
> > -static const struct mtk_clk_desc vpp0_desc = {
> > - .clks = vpp0_clks,
> > - .num_clks = ARRAY_SIZE(vpp0_clks),
> > -};
> > +static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct device_node *node = dev->parent->of_node;
> > + struct clk_onecell_data *clk_data;
> > + int r;
> >
> > -static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
> > - {
> > - .compatible = "mediatek,mt8195-vppsys0",
> > - .data = &vpp0_desc,
> > - }, {
> > - /* sentinel */
> > - }
> > -};
> > + clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
> > + if (!clk_data)
> > + return -ENOMEM;
> > +
> > + r = mtk_clk_register_gates(node, vpp0_clks,
> > ARRAY_SIZE(vpp0_clks), clk_data);
>
> This API is wrecked by a patch from AngeloGioacchino. Can you resend,
> or
> tell me which device should be used here?
Hi Stephen,
Thanks for your time and hlep.
Refer to
https://lore.kernel.org/lkml/[email protected]/
, both clk-mt8195-vpp0/1 need to add "&pdev->dev" to the 1st param. in
the API to match the modification.
Regards,
Moudy
Il 30/01/23 20:36, Stephen Boyd ha scritto:
> Quoting Moudy Ho (2023-01-17 19:15:08)
>> diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c b/drivers/clk/mediatek/clk-mt8195-vpp0.c
>> index bf2939c3a023..6d5800f69f6c 100644
>> --- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
>> +++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
>> @@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
>> GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC, "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
>> };
>>
>> -static const struct mtk_clk_desc vpp0_desc = {
>> - .clks = vpp0_clks,
>> - .num_clks = ARRAY_SIZE(vpp0_clks),
>> -};
>> +static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
>> +{
>> + struct device *dev = &pdev->dev;
>> + struct device_node *node = dev->parent->of_node;
>> + struct clk_onecell_data *clk_data;
>> + int r;
>>
>> -static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
>> - {
>> - .compatible = "mediatek,mt8195-vppsys0",
>> - .data = &vpp0_desc,
>> - }, {
>> - /* sentinel */
>> - }
>> -};
>> + clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
>> + if (!clk_data)
>> + return -ENOMEM;
>> +
>> + r = mtk_clk_register_gates(node, vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
>
> This API is wrecked by a patch from AngeloGioacchino. Can you resend, or
> tell me which device should be used here?
mtk_clk_register_gates(&pdev->dev, node, vpp0_clks, ......);
...with that change, for this patch:
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
P.S.: Next cleanup round will introduce mtk_clk_pdev_simple_probe()
Cheers,
Angelo
On Wed, Jan 18, 2023 at 11:16 AM Moudy Ho <[email protected]> wrote:
>
> MT8195 VPPSYS0/1 will be probed by the compatible name in
> the mtk-mmsys driver and then probe its own clock driver as
> a platform driver.
>
> Signed-off-by: Moudy Ho <[email protected]>
> ---
> drivers/clk/mediatek/clk-mt8195-vpp0.c | 58 +++++++++++++++++++-------
> drivers/clk/mediatek/clk-mt8195-vpp1.c | 58 +++++++++++++++++++-------
> 2 files changed, 86 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> index bf2939c3a023..6d5800f69f6c 100644
> --- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> +++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> @@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
> GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC, "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
> };
>
> -static const struct mtk_clk_desc vpp0_desc = {
> - .clks = vpp0_clks,
> - .num_clks = ARRAY_SIZE(vpp0_clks),
> -};
> +static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *node = dev->parent->of_node;
> + struct clk_onecell_data *clk_data;
mtk_alloc_clk_data() API changed a couple releases back. So:
struct clk_hw_onecell_data
> + int r;
>
> -static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
> - {
> - .compatible = "mediatek,mt8195-vppsys0",
> - .data = &vpp0_desc,
> - }, {
> - /* sentinel */
> - }
> -};
> + clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
> + if (!clk_data)
> + return -ENOMEM;
> +
> + r = mtk_clk_register_gates(node, vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
API changed.
> + if (r)
> + goto free_vpp0_data;
> +
> + r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
of_clk_add_provider(node, of_clk_hw_onecell_get, clk_data);
Same for the other driver.
ChenYu
> + if (r)
> + goto unregister_gates;
> +
> + platform_set_drvdata(pdev, clk_data);
> +
> + return r;
> +
> +unregister_gates:
> + mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
> +free_vpp0_data:
> + mtk_free_clk_data(clk_data);
> + return r;
> +}
> +
> +static int clk_mt8195_vpp0_remove(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *node = dev->parent->of_node;
> + struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
> +
> + of_clk_del_provider(node);
> + mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
> + mtk_free_clk_data(clk_data);
> +
> + return 0;
> +}
>
> static struct platform_driver clk_mt8195_vpp0_drv = {
> - .probe = mtk_clk_simple_probe,
> - .remove = mtk_clk_simple_remove,
> + .probe = clk_mt8195_vpp0_probe,
> + .remove = clk_mt8195_vpp0_remove,
> .driver = {
> .name = "clk-mt8195-vpp0",
> - .of_match_table = of_match_clk_mt8195_vpp0,
> },
> };
> builtin_platform_driver(clk_mt8195_vpp0_drv);
> diff --git a/drivers/clk/mediatek/clk-mt8195-vpp1.c b/drivers/clk/mediatek/clk-mt8195-vpp1.c
> index ffd52c762890..3b88c69e96c9 100644
> --- a/drivers/clk/mediatek/clk-mt8195-vpp1.c
> +++ b/drivers/clk/mediatek/clk-mt8195-vpp1.c
> @@ -84,26 +84,54 @@ static const struct mtk_gate vpp1_clks[] = {
> GATE_VPP1_1(CLK_VPP1_VPP_SPLIT_26M, "vpp1_vpp_split_26m", "clk26m", 26),
> };
>
> -static const struct mtk_clk_desc vpp1_desc = {
> - .clks = vpp1_clks,
> - .num_clks = ARRAY_SIZE(vpp1_clks),
> -};
> +static int clk_mt8195_vpp1_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *node = dev->parent->of_node;
> + struct clk_onecell_data *clk_data;
> + int r;
>
> -static const struct of_device_id of_match_clk_mt8195_vpp1[] = {
> - {
> - .compatible = "mediatek,mt8195-vppsys1",
> - .data = &vpp1_desc,
> - }, {
> - /* sentinel */
> - }
> -};
> + clk_data = mtk_alloc_clk_data(CLK_VPP1_NR_CLK);
> + if (!clk_data)
> + return -ENOMEM;
> +
> + r = mtk_clk_register_gates(node, vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
> + if (r)
> + goto free_vpp1_data;
> +
> + r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
> + if (r)
> + goto unregister_gates;
> +
> + platform_set_drvdata(pdev, clk_data);
> +
> + return r;
> +
> +unregister_gates:
> + mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
> +free_vpp1_data:
> + mtk_free_clk_data(clk_data);
> + return r;
> +}
> +
> +static int clk_mt8195_vpp1_remove(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *node = dev->parent->of_node;
> + struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
> +
> + of_clk_del_provider(node);
> + mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
> + mtk_free_clk_data(clk_data);
> +
> + return 0;
> +}
>
> static struct platform_driver clk_mt8195_vpp1_drv = {
> - .probe = mtk_clk_simple_probe,
> - .remove = mtk_clk_simple_remove,
> + .probe = clk_mt8195_vpp1_probe,
> + .remove = clk_mt8195_vpp1_remove,
> .driver = {
> .name = "clk-mt8195-vpp1",
> - .of_match_table = of_match_clk_mt8195_vpp1,
> },
> };
> builtin_platform_driver(clk_mt8195_vpp1_drv);
> --
> 2.18.0
>
On Tue, 2023-01-31 at 17:50 +0800, Chen-Yu Tsai wrote:
> On Wed, Jan 18, 2023 at 11:16 AM Moudy Ho <[email protected]>
> wrote:
> >
> > MT8195 VPPSYS0/1 will be probed by the compatible name in
> > the mtk-mmsys driver and then probe its own clock driver as
> > a platform driver.
> >
> > Signed-off-by: Moudy Ho <[email protected]>
> > ---
> > drivers/clk/mediatek/clk-mt8195-vpp0.c | 58 +++++++++++++++++++---
> > ----
> > drivers/clk/mediatek/clk-mt8195-vpp1.c | 58 +++++++++++++++++++---
> > ----
> > 2 files changed, 86 insertions(+), 30 deletions(-)
> >
> > diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > index bf2939c3a023..6d5800f69f6c 100644
> > --- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > +++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > @@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
> > GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC,
> > "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
> > };
> >
> > -static const struct mtk_clk_desc vpp0_desc = {
> > - .clks = vpp0_clks,
> > - .num_clks = ARRAY_SIZE(vpp0_clks),
> > -};
> > +static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct device_node *node = dev->parent->of_node;
> > + struct clk_onecell_data *clk_data;
>
> mtk_alloc_clk_data() API changed a couple releases back. So:
>
> struct clk_hw_onecell_data
>
> > + int r;
> >
> > -static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
> > - {
> > - .compatible = "mediatek,mt8195-vppsys0",
> > - .data = &vpp0_desc,
> > - }, {
> > - /* sentinel */
> > - }
> > -};
> > + clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
> > + if (!clk_data)
> > + return -ENOMEM;
> > +
> > + r = mtk_clk_register_gates(node, vpp0_clks,
> > ARRAY_SIZE(vpp0_clks), clk_data);
>
> API changed.
>
> > + if (r)
> > + goto free_vpp0_data;
> > +
> > + r = of_clk_add_provider(node, of_clk_src_onecell_get,
> > clk_data);
>
> of_clk_add_provider(node, of_clk_hw_onecell_get,
> clk_data);
>
> Same for the other driver.
>
>
> ChenYu
>
Hi ChenYu,
Thanks for taking the time, could you please take a look at the v7?
https://lore.kernel.org/lkml/[email protected]/
Regards,
Moudy
> > + if (r)
> > + goto unregister_gates;
> > +
> > + platform_set_drvdata(pdev, clk_data);
> > +
> > + return r;
> > +
> > +unregister_gates:
> > + mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks),
> > clk_data);
> > +free_vpp0_data:
> > + mtk_free_clk_data(clk_data);
> > + return r;
> > +}
> > +
> > +static int clk_mt8195_vpp0_remove(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct device_node *node = dev->parent->of_node;
> > + struct clk_hw_onecell_data *clk_data =
> > platform_get_drvdata(pdev);
> > +
> > + of_clk_del_provider(node);
> > + mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks),
> > clk_data);
> > + mtk_free_clk_data(clk_data);
> > +
> > + return 0;
> > +}
> >
> > static struct platform_driver clk_mt8195_vpp0_drv = {
> > - .probe = mtk_clk_simple_probe,
> > - .remove = mtk_clk_simple_remove,
> > + .probe = clk_mt8195_vpp0_probe,
> > + .remove = clk_mt8195_vpp0_remove,
> > .driver = {
> > .name = "clk-mt8195-vpp0",
> > - .of_match_table = of_match_clk_mt8195_vpp0,
> > },
> > };
> > builtin_platform_driver(clk_mt8195_vpp0_drv);
> > diff --git a/drivers/clk/mediatek/clk-mt8195-vpp1.c
> > b/drivers/clk/mediatek/clk-mt8195-vpp1.c
> > index ffd52c762890..3b88c69e96c9 100644
> > --- a/drivers/clk/mediatek/clk-mt8195-vpp1.c
> > +++ b/drivers/clk/mediatek/clk-mt8195-vpp1.c
> > @@ -84,26 +84,54 @@ static const struct mtk_gate vpp1_clks[] = {
> > GATE_VPP1_1(CLK_VPP1_VPP_SPLIT_26M, "vpp1_vpp_split_26m",
> > "clk26m", 26),
> > };
> >
> > -static const struct mtk_clk_desc vpp1_desc = {
> > - .clks = vpp1_clks,
> > - .num_clks = ARRAY_SIZE(vpp1_clks),
> > -};
> > +static int clk_mt8195_vpp1_probe(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct device_node *node = dev->parent->of_node;
> > + struct clk_onecell_data *clk_data;
> > + int r;
> >
> > -static const struct of_device_id of_match_clk_mt8195_vpp1[] = {
> > - {
> > - .compatible = "mediatek,mt8195-vppsys1",
> > - .data = &vpp1_desc,
> > - }, {
> > - /* sentinel */
> > - }
> > -};
> > + clk_data = mtk_alloc_clk_data(CLK_VPP1_NR_CLK);
> > + if (!clk_data)
> > + return -ENOMEM;
> > +
> > + r = mtk_clk_register_gates(node, vpp1_clks,
> > ARRAY_SIZE(vpp1_clks), clk_data);
> > + if (r)
> > + goto free_vpp1_data;
> > +
> > + r = of_clk_add_provider(node, of_clk_src_onecell_get,
> > clk_data);
> > + if (r)
> > + goto unregister_gates;
> > +
> > + platform_set_drvdata(pdev, clk_data);
> > +
> > + return r;
> > +
> > +unregister_gates:
> > + mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks),
> > clk_data);
> > +free_vpp1_data:
> > + mtk_free_clk_data(clk_data);
> > + return r;
> > +}
> > +
> > +static int clk_mt8195_vpp1_remove(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct device_node *node = dev->parent->of_node;
> > + struct clk_hw_onecell_data *clk_data =
> > platform_get_drvdata(pdev);
> > +
> > + of_clk_del_provider(node);
> > + mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks),
> > clk_data);
> > + mtk_free_clk_data(clk_data);
> > +
> > + return 0;
> > +}
> >
> > static struct platform_driver clk_mt8195_vpp1_drv = {
> > - .probe = mtk_clk_simple_probe,
> > - .remove = mtk_clk_simple_remove,
> > + .probe = clk_mt8195_vpp1_probe,
> > + .remove = clk_mt8195_vpp1_remove,
> > .driver = {
> > .name = "clk-mt8195-vpp1",
> > - .of_match_table = of_match_clk_mt8195_vpp1,
> > },
> > };
> > builtin_platform_driver(clk_mt8195_vpp1_drv);
> > --
> > 2.18.0
> >