2023-01-24 10:13:55

by Jerome Brunet

Subject: [PATCH v2 net] net: mdio-mux-meson-g12a: force internal PHY off on mux switch

Force the internal PHY off then on when switching to the internal path.
This fixes problems where the PHY ID is not properly set.

Fixes: 7090425104db ("net: phy: add amlogic g12a mdio mux support")
Suggested-by: Qi Duan <[email protected]>
Co-developed-by: Heiner Kallweit <[email protected]>
Signed-off-by: Heiner Kallweit <[email protected]>
Signed-off-by: Jerome Brunet <[email protected]>
---

Changes since v1:
- Fix variable position for reverse Xmas tree requirement.

The initial discussion about this change can be found here:
https://lore.kernel.org/all/[email protected]/

drivers/net/mdio/mdio-mux-meson-g12a.c | 23 ++++++++++++++++-------
1 file changed, 16 insertions(+), 7 deletions(-)

diff --git a/drivers/net/mdio/mdio-mux-meson-g12a.c b/drivers/net/mdio/mdio-mux-meson-g12a.c
index 4a2e94faf57e..c4542ecf5623 100644
--- a/drivers/net/mdio/mdio-mux-meson-g12a.c
+++ b/drivers/net/mdio/mdio-mux-meson-g12a.c
@@ -4,6 +4,7 @@
*/

#include <linux/bitfield.h>
+#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/device.h>
@@ -150,6 +151,7 @@ static const struct clk_ops g12a_ephy_pll_ops = {

static int g12a_enable_internal_mdio(struct g12a_mdio_mux *priv)
{
+ u32 value;
int ret;

/* Enable the phy clock */
@@ -163,18 +165,25 @@ static int g12a_enable_internal_mdio(struct g12a_mdio_mux *priv)

/* Initialize ephy control */
writel(EPHY_G12A_ID, priv->regs + ETH_PHY_CNTL0);
- writel(FIELD_PREP(PHY_CNTL1_ST_MODE, 3) |
- FIELD_PREP(PHY_CNTL1_ST_PHYADD, EPHY_DFLT_ADD) |
- FIELD_PREP(PHY_CNTL1_MII_MODE, EPHY_MODE_RMII) |
- PHY_CNTL1_CLK_EN |
- PHY_CNTL1_CLKFREQ |
- PHY_CNTL1_PHY_ENB,
- priv->regs + ETH_PHY_CNTL1);
+
+ /* Make sure we get a 0 -> 1 transition on the enable bit */
+ value = FIELD_PREP(PHY_CNTL1_ST_MODE, 3) |
+ FIELD_PREP(PHY_CNTL1_ST_PHYADD, EPHY_DFLT_ADD) |
+ FIELD_PREP(PHY_CNTL1_MII_MODE, EPHY_MODE_RMII) |
+ PHY_CNTL1_CLK_EN |
+ PHY_CNTL1_CLKFREQ;
+ writel(value, priv->regs + ETH_PHY_CNTL1);
writel(PHY_CNTL2_USE_INTERNAL |
PHY_CNTL2_SMI_SRC_MAC |
PHY_CNTL2_RX_CLK_EPHY,
priv->regs + ETH_PHY_CNTL2);

+ value |= PHY_CNTL1_PHY_ENB;
+ writel(value, priv->regs + ETH_PHY_CNTL1);
+
+ /* The phy needs a bit of time to power up */
+ mdelay(10);
+
return 0;
}

--
2.39.0

2023-01-26 07:30:56

by patchwork-bot+netdevbpf

Subject: Re: [PATCH v2 net] net: mdio-mux-meson-g12a: force internal PHY off on mux switch

Hello:

This patch was applied to netdev/net.git (master)
by Jakub Kicinski <[email protected]>:

On Tue, 24 Jan 2023 11:11:57 +0100 you wrote:
> Force the internal PHY off then on when switching to the internal path.
> This fixes problems where the PHY ID is not properly set.
>
> Fixes: 7090425104db ("net: phy: add amlogic g12a mdio mux support")
> Suggested-by: Qi Duan <[email protected]>
> Co-developed-by: Heiner Kallweit <[email protected]>
> Signed-off-by: Heiner Kallweit <[email protected]>
> Signed-off-by: Jerome Brunet <[email protected]>
>
> [...]

Here is the summary with links:
- [v2,net] net: mdio-mux-meson-g12a: force internal PHY off on mux switch
https://git.kernel.org/netdev/net/c/7083df59abbc

You are awesome, thank you!
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