2023-01-30 19:12:21

by Fabrizio Castro

Subject: [PATCH v2] arm64: dts: renesas: v2mevk2: Add uSD card and eMMC support

The RZ/V2M EVK comes with a slot for a uSD card, and an eMMC.
Add support for the both of them.

Please note that the pinctrl driver for RZ/V2M doesn't support
interrupts yet, therefore the card detect pin has been connected
to the SDHI IP directly in this patch.
We'll connect the card detect pin to its corresponding GPIO when
we'll have driver support for interrupts in the RZ/V2M pinctrl
driver.

Signed-off-by: Fabrizio Castro <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
---
v1->v2: Add properties no-sd; and no-sdio; to emmc node
Moved emmc_pins to respect sort order
Added Reviewed-by: Geert Uytterhoeven <[email protected]>

.../boot/dts/renesas/r9a09g011-v2mevk2.dts | 124 ++++++++++++++++++
1 file changed, 124 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
index d6737395df67..36a2afeb6c74 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts
@@ -7,6 +7,7 @@

/dts-v1/;
#include "r9a09g011.dtsi"
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rzv2m-pinctrl.h>

/ {
@@ -35,6 +36,36 @@ memory@180000000 {
device_type = "memory";
reg = <0x1 0x80000000 0x0 0x80000000>;
};
+
+ reg_1v8: regulator-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vccq_sdhi0: regulator-vccq-sdhi0 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI0 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&pwc 0 GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <3300000 0>, <1800000 1>;
+ };
};

&avb {
@@ -50,6 +81,24 @@ phy0: ethernet-phy@0 {
};
};

+&emmc {
+ pinctrl-0 = <&emmc_pins>;
+ pinctrl-1 = <&emmc_pins>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&reg_3v3>;
+ vqmmc-supply = <&reg_1v8>;
+ bus-width = <8>;
+ mmc-hs200-1_8v;
+ no-sd;
+ no-sdio;
+ non-removable;
+ fixed-emmc-driver-type = <1>;
+ max-frequency = <200000000>;
+ status = "okay";
+};
+
+
&extal_clk {
clock-frequency = <48000000>;
};
@@ -69,6 +118,26 @@ &i2c2 {
};

&pinctrl {
+ emmc_pins: emmc {
+ emmc_pins_data {
+ pinmux = <RZV2M_PORT_PINMUX(0, 0, 2)>, /* MMDAT0 */
+ <RZV2M_PORT_PINMUX(0, 1, 2)>, /* MMDAT1 */
+ <RZV2M_PORT_PINMUX(0, 2, 2)>, /* MMDAT2 */
+ <RZV2M_PORT_PINMUX(0, 3, 2)>, /* MMDAT3 */
+ <RZV2M_PORT_PINMUX(0, 4, 2)>, /* MMDAT4 */
+ <RZV2M_PORT_PINMUX(0, 5, 2)>, /* MMDAT5 */
+ <RZV2M_PORT_PINMUX(0, 6, 2)>, /* MMDAT6 */
+ <RZV2M_PORT_PINMUX(0, 7, 2)>; /* MMDAT7 */
+ power-source = <1800>;
+ };
+
+ emmc_pins_ctrl {
+ pinmux = <RZV2M_PORT_PINMUX(0, 10, 2)>, /* MMCMD */
+ <RZV2M_PORT_PINMUX(0, 11, 2)>; /* MMCLK */
+ power-source = <1800>;
+ };
+ };
+
i2c0_pins: i2c0 {
pinmux = <RZV2M_PORT_PINMUX(5, 0, 2)>, /* SDA */
<RZV2M_PORT_PINMUX(5, 1, 2)>; /* SCL */
@@ -78,6 +147,48 @@ i2c2_pins: i2c2 {
pinmux = <RZV2M_PORT_PINMUX(3, 8, 2)>, /* SDA */
<RZV2M_PORT_PINMUX(3, 9, 2)>; /* SCL */
};
+
+ sdhi0_pins: sd0 {
+ sd0_data {
+ pinmux = <RZV2M_PORT_PINMUX(8, 2, 1)>, /* SD0DAT0 */
+ <RZV2M_PORT_PINMUX(8, 3, 1)>, /* SD0DAT1 */
+ <RZV2M_PORT_PINMUX(8, 4, 1)>, /* SD0DAT2 */
+ <RZV2M_PORT_PINMUX(8, 5, 1)>; /* SD0DAT3 */
+ power-source = <3300>;
+ };
+
+ sd0_ctrl {
+ pinmux = <RZV2M_PORT_PINMUX(8, 0, 1)>, /* SD0CMD */
+ <RZV2M_PORT_PINMUX(8, 1, 1)>; /* SD0CLK */
+ power-source = <3300>;
+ };
+
+ sd0_cd {
+ pinmux = <RZV2M_PORT_PINMUX(8, 7, 1)>; /* SD0CD */
+ power-source = <3300>;
+ };
+ };
+
+ sdhi0_pins_uhs: sd0_uhs {
+ sd0_data_uhs {
+ pinmux = <RZV2M_PORT_PINMUX(8, 2, 1)>, /* SD0DAT0 */
+ <RZV2M_PORT_PINMUX(8, 3, 1)>, /* SD0DAT1 */
+ <RZV2M_PORT_PINMUX(8, 4, 1)>, /* SD0DAT2 */
+ <RZV2M_PORT_PINMUX(8, 5, 1)>; /* SD0DAT3 */
+ power-source = <1800>;
+ };
+
+ sd0_ctrl_uhs {
+ pinmux = <RZV2M_PORT_PINMUX(8, 0, 1)>, /* SD0CMD */
+ <RZV2M_PORT_PINMUX(8, 1, 1)>; /* SD0CLK */
+ power-source = <1800>;
+ };
+
+ sd0_cd_uhs {
+ pinmux = <RZV2M_PORT_PINMUX(8, 7, 1)>; /* SD0CD */
+ power-source = <1800>;
+ };
+ };
};

&pwc {
@@ -85,6 +196,19 @@ &pwc {
status = "okay";
};

+&sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-1 = <&sdhi0_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&reg_3v3>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
--
2.34.1

2023-02-02 08:49:10

by Krzysztof Kozlowski

Subject: Re: [PATCH v2] arm64: dts: renesas: v2mevk2: Add uSD card and eMMC support

On 30/01/2023 20:11, Fabrizio Castro wrote:
> The RZ/V2M EVK comes with a slot for a uSD card, and an eMMC.
> Add support for the both of them.
>
> Please note that the pinctrl driver for RZ/V2M doesn't support
> interrupts yet, therefore the card detect pin has been connected
> to the SDHI IP directly in this patch.
> We'll connect the card detect pin to its corresponding GPIO when
> we'll have driver support for interrupts in the RZ/V2M pinctrl
> driver.
>
> Signed-off-by: Fabrizio Castro <[email protected]>
> Reviewed-by: Geert Uytterhoeven <[email protected]>
> ---

> +
> +

Just one blank line

> &extal_clk {
> clock-frequency = <48000000>;
> };
> @@ -69,6 +118,26 @@ &i2c2 {
> };
>
> &pinctrl {
> + emmc_pins: emmc {
> + emmc_pins_data {

No underscores in node names.

Best regards,
Krzysztof

2023-02-14 11:49:18

by Geert Uytterhoeven

Subject: Re: [PATCH v2] arm64: dts: renesas: v2mevk2: Add uSD card and eMMC support

On Thu, Feb 2, 2023 at 9:48 AM Krzysztof Kozlowski
<[email protected]> wrote:
> On 30/01/2023 20:11, Fabrizio Castro wrote:
> > The RZ/V2M EVK comes with a slot for a uSD card, and an eMMC.
> > Add support for the both of them.
> >
> > Please note that the pinctrl driver for RZ/V2M doesn't support
> > interrupts yet, therefore the card detect pin has been connected
> > to the SDHI IP directly in this patch.
> > We'll connect the card detect pin to its corresponding GPIO when
> > we'll have driver support for interrupts in the RZ/V2M pinctrl
> > driver.
> >
> > Signed-off-by: Fabrizio Castro <[email protected]>
> > Reviewed-by: Geert Uytterhoeven <[email protected]>
> > ---
>
> > +
> > +
>
> Just one blank line

Fixing...

> > &extal_clk {
> > clock-frequency = <48000000>;
> > };
> > @@ -69,6 +118,26 @@ &i2c2 {
> > };
> >
> > &pinctrl {
> > + emmc_pins: emmc {
> > + emmc_pins_data {
>
> No underscores in node names.

... and renaming to "data" etc. while queuing in renesas-devel for v6.4.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds