This commits are based on the Fabien Parent <[email protected]> work.
The purpose of this series is to add the following HWs / IPs support for
the MT8365 SoC:
- System Power Manager
- MultiMedia Memory Management Unit "M4U" (IOMMU)
- Smart Multimedia Interface "SMI"
- Local arbiter "LARB"
This series depends to two others which add power support for MT8365 SoC
[1] [2].
Regards,
Alex
[1]: https://lore.kernel.org/all/[email protected]/
[2]: https://lore.kernel.org/lkml/[email protected]/
Signed-off-by: Alexandre Mergnat <[email protected]>
---
Changes in v2:
- Split power domain patch (3) in 4 patches to explain in the commit
messages the added subsystems.
- Add an independent "mediatek,mt8365-smi-common" compatible to have
its own LARB bus select.
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Alexandre Mergnat (10):
dt-bindings: memory-controllers: mediatek,smi-common: add mt8365
dt-bindings: memory-controllers: mediatek,smi-larb: add mt8365
arm64: dts: mediatek: add mmsys support for mt8365 SoC
arm64: dts: mediatek: add camsys support for mt8365 SoC
arm64: dts: mediatek: add apu support for mt8365 SoC
arm64: dts: mediatek: add power domain support for mt8365 SoC
arm64: dts: mediatek: add smi support for mt8365 SoC
arm64: dts: mediatek: add larb support for mt8365 SoC
arm64: dts: mediatek: add iommu support for mt8365 SoC
memory: mtk-smi: mt8365: Add SMI Support
.../memory-controllers/mediatek,smi-common.yaml | 2 +
.../memory-controllers/mediatek,smi-larb.yaml | 4 +
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 210 +++++++++++++++++++++
drivers/memory/mtk-smi.c | 7 +
4 files changed, 223 insertions(+)
---
base-commit: 1db7fc94e6e116f43f7bf3adb33407f21bc29fd9
change-id: 20230207-iommu-support-5e620926e42e
Best regards,
--
Alexandre Mergnat <[email protected]>
Add binding description for mediatek,mt8365-smi-larb
Reviewed-by: Matthias Brugger <[email protected]>
Signed-off-by: Alexandre Mergnat <[email protected]>
---
.../devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
index 5f4ac3609887..aee7f6cf1300 100644
--- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
@@ -34,6 +34,10 @@ properties:
- const: mediatek,mt7623-smi-larb
- const: mediatek,mt2701-smi-larb
+ - items:
+ - const: mediatek,mt8365-smi-larb
+ - const: mediatek,mt8186-smi-larb
+
reg:
maxItems: 1
--
2.25.1
Add binding description for mediatek,mt8365-smi-common
Reviewed-by: Matthias Brugger <[email protected]>
Signed-off-by: Alexandre Mergnat <[email protected]>
---
.../devicetree/bindings/memory-controllers/mediatek,smi-common.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
index a8fda30cccbb..2f36ac23604c 100644
--- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
@@ -43,6 +43,7 @@ properties:
- mediatek,mt8195-smi-common-vdo
- mediatek,mt8195-smi-common-vpp
- mediatek,mt8195-smi-sub-common
+ - mediatek,mt8365-smi-common
- description: for mt7623
items:
@@ -133,6 +134,7 @@ allOf:
- mediatek,mt8192-smi-common
- mediatek,mt8195-smi-common-vdo
- mediatek,mt8195-smi-common-vpp
+ - mediatek,mt8365-smi-common
then:
properties:
--
2.25.1
Multimedia subsystem (MMsys) contains multimedia controller, Multimedia
Data Path v2.0 (MDP 2.0) and Display (DISP). The multimedia controller
includes bus fabric control, Smart Memory Interface (SMI) control,
memory access second-level arbiter, and multimedia configuration. It
plays the key role in handling different handshakings between infra
subsystem, video subsystem, image subsystem and G3D subsystem.
For more detail, ask Mediatek for the MT8365 AIoT application processor
functional specification.
Signed-off-by: Alexandre Mergnat <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
index b5f5c77f7f84..db9ab538c34d 100644
--- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
@@ -592,6 +592,12 @@ u2port1: usb-phy@1000 {
#phy-cells = <1>;
};
};
+
+ mmsys: syscon@14000000 {
+ compatible = "mediatek,mt8365-mmsys", "syscon";
+ reg = <0 0x14000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
};
timer {
--
2.25.1
Camera System (CamSys) incorporates an enhanced feature based image
signal processor to connect a variety of image sensor components. This
processor consists of timing generated unit (TG), lens/sensor
compensation unit and image process unit.
For more detail, ask Mediatek for the MT8365 AIoT application processor
functional specification.
Signed-off-by: Alexandre Mergnat <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
index db9ab538c34d..73cb10d296fa 100644
--- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
@@ -598,6 +598,12 @@ mmsys: syscon@14000000 {
reg = <0 0x14000000 0 0x1000>;
#clock-cells = <1>;
};
+
+ camsys: syscon@15000000 {
+ compatible = "mediatek,mt8365-imgsys", "syscon";
+ reg = <0 0x15000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
};
timer {
--
2.25.1
AI Processor Unit System (APUSYS) is a highly efficient computing unit
system which is most suitable for AI/CV algorithms. It includes one
programmable AI processor (Cadence VP6) for both AI and CV algorithms,
and an eDMA engine for data movement between external DRAM and VP6
internal memory.
For more detail, ask Mediatek for the MT8365 AIoT application processor
functional specification.
Signed-off-by: Alexandre Mergnat <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
index 73cb10d296fa..386ab8902b55 100644
--- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
@@ -604,6 +604,12 @@ camsys: syscon@15000000 {
reg = <0 0x15000000 0 0x1000>;
#clock-cells = <1>;
};
+
+ apu: syscon@19020000 {
+ compatible = "mediatek,mt8365-apu", "syscon";
+ reg = <0 0x19020000 0 0x1000>;
+ #clock-cells = <1>;
+ };
};
timer {
--
2.25.1
Smart Multimedia Interface (SMI) local arbiter does the arbitration for
memory requests from multi-media engines. Add SMI in the MT8365 DTS will
allow to add local ARBiter (LARB), use by IOMMU.
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Signed-off-by: Alexandre Mergnat <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
index 0e4fa69a2415..70915beb513c 100644
--- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
@@ -324,16 +324,19 @@ power-domain@MT8365_POWER_DOMAIN_CAM {
"cam-4", "cam-5";
#power-domain-cells = <0>;
mediatek,infracfg = <&infracfg>;
+ mediatek,smi = <&smi_common>;
};
power-domain@MT8365_POWER_DOMAIN_VDEC {
reg = <MT8365_POWER_DOMAIN_VDEC>;
#power-domain-cells = <0>;
+ mediatek,smi = <&smi_common>;
};
power-domain@MT8365_POWER_DOMAIN_VENC {
reg = <MT8365_POWER_DOMAIN_VENC>;
#power-domain-cells = <0>;
+ mediatek,smi = <&smi_common>;
};
power-domain@MT8365_POWER_DOMAIN_APU {
@@ -351,6 +354,7 @@ power-domain@MT8365_POWER_DOMAIN_APU {
"apu-5";
#power-domain-cells = <0>;
mediatek,infracfg = <&infracfg>;
+ mediatek,smi = <&smi_common>;
};
};
@@ -709,6 +713,17 @@ mmsys: syscon@14000000 {
#clock-cells = <1>;
};
+ smi_common: smi@14002000 {
+ compatible = "mediatek,mt8365-smi-common";
+ reg = <0 0x14002000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_MM_SMI_COMMON>,
+ <&mmsys CLK_MM_MM_SMI_COMMON>,
+ <&mmsys CLK_MM_MM_SMI_COMM0>,
+ <&mmsys CLK_MM_MM_SMI_COMM1>;
+ clock-names = "apb", "smi", "gals0", "gals1";
+ power-domains = <&spm MT8365_POWER_DOMAIN_MM>;
+ };
+
camsys: syscon@15000000 {
compatible = "mediatek,mt8365-imgsys", "syscon";
reg = <0 0x15000000 0 0x1000>;
--
2.25.1
The following power domain are added to the SoC dts:
- MM (MultiMedia)
- CONN (Connectivity)
- MFG (MFlexGraphics)
- Audio
- Cam (Camera)
- DSP (Digital Signal Processor)
- Vdec (Video decoder)
- Venc (Video encoder)
- APU (AI Processor Unit)
Signed-off-by: Alexandre Mergnat <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 110 +++++++++++++++++++++++++++++++
1 file changed, 110 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
index 386ab8902b55..0e4fa69a2415 100644
--- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/power/mediatek,mt8365-power.h>
/ {
compatible = "mediatek,mt8365";
@@ -282,6 +283,115 @@ syscfg_pctl: syscfg-pctl@10005000 {
reg = <0 0x10005000 0 0x1000>;
};
+ scpsys: syscon@10006000 {
+ compatible = "mediatek,mt8365-syscfg", "syscon", "simple-mfd";
+ reg = <0 0x10006000 0 0x1000>;
+ #power-domain-cells = <1>;
+
+ /* System Power Manager */
+ spm: power-controller {
+ compatible = "mediatek,mt8365-power-controller";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #power-domain-cells = <1>;
+
+ /* power domains of the SoC */
+ power-domain@MT8365_POWER_DOMAIN_MM {
+ reg = <MT8365_POWER_DOMAIN_MM>;
+ clocks = <&topckgen CLK_TOP_MM_SEL>,
+ <&mmsys CLK_MM_MM_SMI_COMMON>,
+ <&mmsys CLK_MM_MM_SMI_COMM0>,
+ <&mmsys CLK_MM_MM_SMI_COMM1>,
+ <&mmsys CLK_MM_MM_SMI_LARB0>;
+ clock-names = "mm", "mm-0", "mm-1",
+ "mm-2", "mm-3";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ mediatek,infracfg-nao = <&infracfg_nao>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ power-domain@MT8365_POWER_DOMAIN_CAM {
+ reg = <MT8365_POWER_DOMAIN_CAM>;
+ clocks = <&camsys CLK_CAM_LARB2>,
+ <&camsys CLK_CAM_SENIF>,
+ <&camsys CLK_CAMSV0>,
+ <&camsys CLK_CAMSV1>,
+ <&camsys CLK_CAM_FDVT>,
+ <&camsys CLK_CAM_WPE>;
+ clock-names = "cam-0", "cam-1",
+ "cam-2", "cam-3",
+ "cam-4", "cam-5";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_VDEC {
+ reg = <MT8365_POWER_DOMAIN_VDEC>;
+ #power-domain-cells = <0>;
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_VENC {
+ reg = <MT8365_POWER_DOMAIN_VENC>;
+ #power-domain-cells = <0>;
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_APU {
+ reg = <MT8365_POWER_DOMAIN_APU>;
+ clocks = <&infracfg CLK_IFR_APU_AXI>,
+ <&apu CLK_APU_IPU_CK>,
+ <&apu CLK_APU_AXI>,
+ <&apu CLK_APU_JTAG>,
+ <&apu CLK_APU_IF_CK>,
+ <&apu CLK_APU_EDMA>,
+ <&apu CLK_APU_AHB>;
+ clock-names = "apu", "apu-0",
+ "apu-1", "apu-2",
+ "apu-3", "apu-4",
+ "apu-5";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ };
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_CONN {
+ reg = <MT8365_POWER_DOMAIN_CONN>;
+ clocks = <&topckgen CLK_TOP_CONN_32K>,
+ <&topckgen CLK_TOP_CONN_26M>;
+ clock-names = "conn", "conn1";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_MFG {
+ reg = <MT8365_POWER_DOMAIN_MFG>;
+ clocks = <&topckgen CLK_TOP_MFG_SEL>;
+ clock-names = "mfg";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_AUDIO {
+ reg = <MT8365_POWER_DOMAIN_AUDIO>;
+ clocks = <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
+ <&infracfg CLK_IFR_AUDIO>,
+ <&infracfg CLK_IFR_AUD_26M_BK>;
+ clock-names = "audio", "audio1", "audio2";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_DSP {
+ reg = <MT8365_POWER_DOMAIN_DSP>;
+ clocks = <&topckgen CLK_TOP_DSP_SEL>,
+ <&topckgen CLK_TOP_DSP_26M>;
+ clock-names = "dsp", "dsp1";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ };
+ };
+ };
+
watchdog: watchdog@10007000 {
compatible = "mediatek,mt8365-wdt",
"mediatek,mt6589-wdt";
--
2.25.1
Local arbiter (LARB) is a component of Smart Multimedia Interface (SMI),
used to help the memory management (IOMMU).
This patch add 4 LARBs and 2 clocks for the larb1 and larb3 support.
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Signed-off-by: Alexandre Mergnat <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 59 ++++++++++++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
index 70915beb513c..07a7267f338e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
@@ -724,12 +724,71 @@ smi_common: smi@14002000 {
power-domains = <&spm MT8365_POWER_DOMAIN_MM>;
};
+ larb0: larb@14003000 {
+ compatible = "mediatek,mt8365-smi-larb",
+ "mediatek,mt8186-smi-larb";
+ reg = <0 0x14003000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ clocks = <&mmsys CLK_MM_MM_SMI_LARB0>,
+ <&mmsys CLK_MM_MM_SMI_LARB0>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8365_POWER_DOMAIN_MM>;
+ mediatek,larb-id = <0>;
+ };
+
camsys: syscon@15000000 {
compatible = "mediatek,mt8365-imgsys", "syscon";
reg = <0 0x15000000 0 0x1000>;
#clock-cells = <1>;
};
+ larb2: larb@15001000 {
+ compatible = "mediatek,mt8365-smi-larb",
+ "mediatek,mt8186-smi-larb";
+ reg = <0 0x15001000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ clocks = <&mmsys CLK_MM_MM_SMI_IMG>,
+ <&camsys CLK_CAM_LARB2>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8365_POWER_DOMAIN_CAM>;
+ mediatek,larb-id = <2>;
+ };
+
+ vdecsys: syscon@16000000 {
+ compatible = "mediatek,mt8365-vdecsys", "syscon";
+ reg = <0 0x16000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ larb3: larb@16010000 {
+ compatible = "mediatek,mt8365-smi-larb",
+ "mediatek,mt8186-smi-larb";
+ reg = <0 0x16010000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ clocks = <&vdecsys CLK_VDEC_LARB1>,
+ <&vdecsys CLK_VDEC_LARB1>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8365_POWER_DOMAIN_VDEC>;
+ mediatek,larb-id = <3>;
+ };
+
+ vencsys: syscon@17000000 {
+ compatible = "mediatek,mt8365-vencsys", "syscon";
+ reg = <0 0x17000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ larb1: larb@17010000 {
+ compatible = "mediatek,mt8365-smi-larb",
+ "mediatek,mt8186-smi-larb";
+ reg = <0 0x17010000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ clocks = <&vencsys CLK_VENC>, <&vencsys CLK_VENC>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8365_POWER_DOMAIN_VENC>;
+ mediatek,larb-id = <1>;
+ };
+
apu: syscon@19020000 {
compatible = "mediatek,mt8365-apu", "syscon";
reg = <0 0x19020000 0 0x1000>;
--
2.25.1
Add iommu support in the SoC DTS using the 4 local arbiters (LARBs)
Reviewed-by: Yong Wu <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Signed-off-by: Alexandre Mergnat <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
index 07a7267f338e..6260744f4be5 100644
--- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
@@ -456,6 +456,14 @@ sysirq: interrupt-controller@10200a80 {
reg = <0 0x10200a80 0 0x20>;
};
+ iommu: iommu@10205000 {
+ compatible = "mediatek,mt8365-m4u";
+ reg = <0 0x10205000 0 0x1000>;
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_LOW>;
+ mediatek,larbs = <&larb0>, <&larb1>, <&larb2>, <&larb3>;
+ #iommu-cells = <1>;
+ };
+
infracfg_nao: infracfg@1020e000 {
compatible = "mediatek,mt8365-infracfg", "syscon";
reg = <0 0x1020e000 0 0x1000>;
--
2.25.1
Add MT8365 SMI common support.
Signed-off-by: Alexandre Mergnat <[email protected]>
---
drivers/memory/mtk-smi.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
index 5a9754442bc7..477b5d1ffd46 100644
--- a/drivers/memory/mtk-smi.c
+++ b/drivers/memory/mtk-smi.c
@@ -713,6 +713,12 @@ static const struct mtk_smi_common_plat mtk_smi_sub_common_mt8195 = {
.has_gals = true,
};
+static const struct mtk_smi_common_plat mtk_smi_common_mt8365 = {
+ .type = MTK_SMI_GEN2,
+ .has_gals = true,
+ .bus_sel = F_MMU1_LARB(2) | F_MMU1_LARB(4),
+};
+
static const struct of_device_id mtk_smi_common_of_ids[] = {
{.compatible = "mediatek,mt2701-smi-common", .data = &mtk_smi_common_gen1},
{.compatible = "mediatek,mt2712-smi-common", .data = &mtk_smi_common_gen2},
@@ -728,6 +734,7 @@ static const struct of_device_id mtk_smi_common_of_ids[] = {
{.compatible = "mediatek,mt8195-smi-common-vdo", .data = &mtk_smi_common_mt8195_vdo},
{.compatible = "mediatek,mt8195-smi-common-vpp", .data = &mtk_smi_common_mt8195_vpp},
{.compatible = "mediatek,mt8195-smi-sub-common", .data = &mtk_smi_sub_common_mt8195},
+ {.compatible = "mediatek,mt8365-smi-common", .data = &mtk_smi_common_mt8365},
{}
};
--
2.25.1
On 05/04/2023 10:06, Alexandre Mergnat wrote:
> Add MT8365 SMI common support.
>
> Signed-off-by: Alexandre Mergnat <[email protected]>
> ---
Why the driver patch is after DTS? Driver code cannot be mixed with the
DTS on branches/repos, so such ordering suggest your patchset is not
bisectable.
Best regards,
Krzysztof
Ok, I will move the driver patch before the DTS patches in the next version.
Regards,
Alexandre
Le mer. 5 avr. 2023 à 11:43, Krzysztof Kozlowski
<[email protected]> a écrit :
>
> On 05/04/2023 10:06, Alexandre Mergnat wrote:
> > Add MT8365 SMI common support.
> >
> > Signed-off-by: Alexandre Mergnat <[email protected]>
> > ---
>
> Why the driver patch is after DTS? Driver code cannot be mixed with the
> DTS on branches/repos, so such ordering suggest your patchset is not
> bisectable.
>
> Best regards,
> Krzysztof
>
On 05/04/2023 10:06, Alexandre Mergnat wrote:
> This commits are based on the Fabien Parent <[email protected]> work.
>
> The purpose of this series is to add the following HWs / IPs support for
> the MT8365 SoC:
> - System Power Manager
> - MultiMedia Memory Management Unit "M4U" (IOMMU)
> - Smart Multimedia Interface "SMI"
> - Local arbiter "LARB"
>
> This series depends to two others which add power support for MT8365 SoC
> [1] [2].
So does it mean they cannot be merged? On first glance I do not see the
dependency, so I wonder if we understand the dependencies the same. And
subsystems.
Best regards,
Krzysztof
On 05/04/2023 11:53, Alexandre Mergnat wrote:
> Ok, I will move the driver patch before the DTS patches in the next version.
>
Or do not send it together at all, which might solve your dependency
problem. According to your cover letter I cannot take the memory
controller bits, so I am waiting for dependencies to hit the mainline.
Alternatively I will need pull request with stable tag.
Best regards,
Krzysztof
On 05/04/2023 13:45, Krzysztof Kozlowski wrote:
> On 05/04/2023 11:53, Alexandre Mergnat wrote:
>> Ok, I will move the driver patch before the DTS patches in the next version.
>>
> Or do not send it together at all, which might solve your dependency
> problem. According to your cover letter I cannot take the memory
> controller bits, so I am waiting for dependencies to hit the mainline.
> Alternatively I will need pull request with stable tag.
>
Ok, I prefer send the driver patch in another serie. That will solve the
dependency with the DTS a least.
Regards,
Alexandre
On 05/04/2023 13:43, Krzysztof Kozlowski wrote:
> On 05/04/2023 10:06, Alexandre Mergnat wrote:
>> This commits are based on the Fabien Parent <[email protected]> work.
>>
>> The purpose of this series is to add the following HWs / IPs support for
>> the MT8365 SoC:
>> - System Power Manager
>> - MultiMedia Memory Management Unit "M4U" (IOMMU)
>> - Smart Multimedia Interface "SMI"
>> - Local arbiter "LARB"
>>
>> This series depends to two others which add power support for MT8365 SoC
>> [1] [2].
> So does it mean they cannot be merged? On first glance I do not see the
> dependency, so I wonder if we understand the dependencies the same. And
> subsystems.
Exactly, we shouldn't merge it before the dependent series to don't
break the build due to
"#include <dt-bindings/power/mediatek,mt8365-power.h>" in the DTSI file.
Additionally, LARB will not work properly (or at all) without the power
support.
Regards,
Alexandre
On 05/04/2023 15:13, Alexandre Mergnat wrote:
>
> On 05/04/2023 13:43, Krzysztof Kozlowski wrote:
>> On 05/04/2023 10:06, Alexandre Mergnat wrote:
>>> This commits are based on the Fabien Parent <[email protected]> work.
>>>
>>> The purpose of this series is to add the following HWs / IPs support for
>>> the MT8365 SoC:
>>> - System Power Manager
>>> - MultiMedia Memory Management Unit "M4U" (IOMMU)
>>> - Smart Multimedia Interface "SMI"
>>> - Local arbiter "LARB"
>>>
>>> This series depends to two others which add power support for MT8365 SoC
>>> [1] [2].
>> So does it mean they cannot be merged? On first glance I do not see the
>> dependency, so I wonder if we understand the dependencies the same. And
>> subsystems.
> Exactly, we shouldn't merge it before the dependent series to don't ]
> break the build due to
> "#include <dt-bindings/power/mediatek,mt8365-power.h>" in the DTSI file.
> Additionally, LARB will not work properly (or at all) without the power
> support.
And how driver is related to it? If it is, you might have some unusual
coupling between power and memory controller driver.
Best regards,
Krzysztof
On 05/04/2023 15:06, Alexandre Mergnat wrote:
>
> On 05/04/2023 13:45, Krzysztof Kozlowski wrote:
>> On 05/04/2023 11:53, Alexandre Mergnat wrote:
>>> Ok, I will move the driver patch before the DTS patches in the next version.
>>>
>> Or do not send it together at all, which might solve your dependency
>> problem. According to your cover letter I cannot take the memory
>> controller bits, so I am waiting for dependencies to hit the mainline.
>> Alternatively I will need pull request with stable tag.
>>
> Ok, I prefer send the driver patch in another serie. That will solve the
> dependency with the DTS a least.
What dependency? Why do you have dependencies between drivers and DTS?
That's a no-go.
Best regards,
Krzysztof
On 05/04/2023 15:54, Krzysztof Kozlowski wrote:
> On 05/04/2023 15:06, Alexandre Mergnat wrote:
>> On 05/04/2023 13:45, Krzysztof Kozlowski wrote:
>>> On 05/04/2023 11:53, Alexandre Mergnat wrote:
>>>> Ok, I will move the driver patch before the DTS patches in the next version.
>>>>
>>> Or do not send it together at all, which might solve your dependency
>>> problem. According to your cover letter I cannot take the memory
>>> controller bits, so I am waiting for dependencies to hit the mainline.
>>> Alternatively I will need pull request with stable tag.
>>>
>> Ok, I prefer send the driver patch in another serie. That will solve the
>> dependency with the DTS a least.
> What dependency? Why do you have dependencies between drivers and DTS?
> That's a no-go.
I probably do something wrong but, that start with this comment [1]:
> I guess we should add a independent "mediatek,mt8365-smi-common".
Then I have added the mt8365 compatible support in the driver instead of using the mt8186 which already supported and used in the v1.
I change the binding and DTS to use "mediatek,mt8365-smi-common" only (no more "mediatek,mt8186-smi-common").
Maybe "dependency isn't the good word to use in that case.
Except for the patch order in the serie (or send the driver in another one), everything is fine or there are others wrong things ?
[1]:
https://lore.kernel.org/all/[email protected]/
Regards,
Alexandre
On 05/04/2023 16:34, Alexandre Mergnat wrote:
>
> On 05/04/2023 15:54, Krzysztof Kozlowski wrote:
>> On 05/04/2023 15:06, Alexandre Mergnat wrote:
>>> On 05/04/2023 13:45, Krzysztof Kozlowski wrote:
>>>> On 05/04/2023 11:53, Alexandre Mergnat wrote:
>>>>> Ok, I will move the driver patch before the DTS patches in the next version.
>>>>>
>>>> Or do not send it together at all, which might solve your dependency
>>>> problem. According to your cover letter I cannot take the memory
>>>> controller bits, so I am waiting for dependencies to hit the mainline.
>>>> Alternatively I will need pull request with stable tag.
>>>>
>>> Ok, I prefer send the driver patch in another serie. That will solve the
>>> dependency with the DTS a least.
>> What dependency? Why do you have dependencies between drivers and DTS?
>> That's a no-go.
> I probably do something wrong but, that start with this comment [1]:
>
>> I guess we should add a independent "mediatek,mt8365-smi-common".
>
> Then I have added the mt8365 compatible support in the driver instead of using the mt8186 which already supported and used in the v1.
> I change the binding and DTS to use "mediatek,mt8365-smi-common" only (no more "mediatek,mt8186-smi-common").
> Maybe "dependency isn't the good word to use in that case.
I do not see patch changing existing compatible. Which one is it?
I don't know what is your meaning of dependency then. For all of us,
dependency means one patch must be applied after another patch. So is
this the case here? If yes, then why?
> Except for the patch order in the serie (or send the driver in another one), everything is fine or there are others wrong things ?
If this is the question to me, then I am not the maintainer of your
platform. I am taking only memory controller bits, which look fine and I
would have already apply them if not the dependency trouble. Soon the
window for applying will close, BTW. We are almost at RC6.
Best regards,
Krzysztof
On Wed, 2023-04-05 at 10:06 +0200, Alexandre Mergnat wrote:
>
> Add MT8365 SMI common support.
>
> Signed-off-by: Alexandre Mergnat <[email protected]>
> ---
> drivers/memory/mtk-smi.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
> index 5a9754442bc7..477b5d1ffd46 100644
> --- a/drivers/memory/mtk-smi.c
> +++ b/drivers/memory/mtk-smi.c
> @@ -713,6 +713,12 @@ static const struct mtk_smi_common_plat
> mtk_smi_sub_common_mt8195 = {
> .has_gals = true,
> };
>
> +static const struct mtk_smi_common_plat mtk_smi_common_mt8365 = {
> + .type = MTK_SMI_GEN2,
> + .has_gals = true,
mt8365 doesn't have "gals". Please remove this line, then the code is
ok for me.
Reviewed-by: Yong Wu <[email protected]>
Thanks.
> + .bus_sel = F_MMU1_LARB(2) | F_MMU1_LARB(4),
> +};
> +
> static const struct of_device_id mtk_smi_common_of_ids[] = {
> {.compatible = "mediatek,mt2701-smi-common", .data =
> &mtk_smi_common_gen1},
> {.compatible = "mediatek,mt2712-smi-common", .data =
> &mtk_smi_common_gen2},
> @@ -728,6 +734,7 @@ static const struct of_device_id
> mtk_smi_common_of_ids[] = {
> {.compatible = "mediatek,mt8195-smi-common-vdo", .data =
> &mtk_smi_common_mt8195_vdo},
> {.compatible = "mediatek,mt8195-smi-common-vpp", .data =
> &mtk_smi_common_mt8195_vpp},
> {.compatible = "mediatek,mt8195-smi-sub-common", .data =
> &mtk_smi_sub_common_mt8195},
> + {.compatible = "mediatek,mt8365-smi-common", .data =
> &mtk_smi_common_mt8365},
> {}
> };
>
>
> --
> 2.25.1
>
Le jeu. 6 avr. 2023 à 09:50, Krzysztof Kozlowski
<[email protected]> a écrit :
>
> On 05/04/2023 16:34, Alexandre Mergnat wrote:
> >
> > On 05/04/2023 15:54, Krzysztof Kozlowski wrote:
> >> On 05/04/2023 15:06, Alexandre Mergnat wrote:
> >>> On 05/04/2023 13:45, Krzysztof Kozlowski wrote:
> >>>> On 05/04/2023 11:53, Alexandre Mergnat wrote:
> >>>>> Ok, I will move the driver patch before the DTS patches in the next version.
> >>>>>
> >>>> Or do not send it together at all, which might solve your dependency
> >>>> problem. According to your cover letter I cannot take the memory
> >>>> controller bits, so I am waiting for dependencies to hit the mainline.
> >>>> Alternatively I will need pull request with stable tag.
> >>>>
> >>> Ok, I prefer send the driver patch in another serie. That will solve the
> >>> dependency with the DTS a least.
> >> What dependency? Why do you have dependencies between drivers and DTS?
> >> That's a no-go.
> > I probably do something wrong but, that start with this comment [1]:
> >
> >> I guess we should add a independent "mediatek,mt8365-smi-common".
> >
> > Then I have added the mt8365 compatible support in the driver instead of using the mt8186 which already supported and used in the v1.
> > I change the binding and DTS to use "mediatek,mt8365-smi-common" only (no more "mediatek,mt8186-smi-common").
> > Maybe "dependency isn't the good word to use in that case.
>
> I do not see patch changing existing compatible. Which one is it?
I was talking between the v1 and v2 of this serie
>
> I don't know what is your meaning of dependency then. For all of us,
> dependency means one patch must be applied after another patch. So is
> this the case here? If yes, then why?
I don't think so. I think you start talking dependency in your 2nd
reply about driver/DTS, but this is only related change.
>
> > Except for the patch order in the serie (or send the driver in another one), everything is fine or there are others wrong things ?
>
> If this is the question to me, then I am not the maintainer of your
> platform. I am taking only memory controller bits, which look fine and I
> would have already apply them if not the dependency trouble. Soon the
> window for applying will close, BTW. We are almost at RC6.
The dependency is between the power series and the DTS change in this
series as explained in the cover letter thread (PATCH 00/10).
IMHO, you can take the bindings without worry. I don't see possible regression.
This series seems pretty simple, one part adds MT8365 SMI common
support in the bindings, the mt8365-evk DTS and the mtk-smi driver,
and there are no exotic stuffs.
To conclude: I'm ok to send this driver patch in another series and
put it as a dependency of the iommu series to answer your first
comment:
> >>>>>Driver code cannot be mixed with the DTS on branches/repos, so such ordering suggest your patchset is not bisectable.
Regards,
Alexandre