2023-09-26 02:34:06

by Alexandre Mergnat

[permalink] [raw]
Subject: [PATCH v6 0/7] Add IOMMU support to MT8365 SoC

This commits are based on the Fabien Parent <[email protected]> work.

The purpose of this series is to add the following HWs / IPs support for
the MT8365 SoC:
- System Power Manager
- MultiMedia Memory Management Unit "M4U" (IOMMU)
- Smart Multimedia Interface "SMI"
- Local arbiter "LARB"

This serie depends to another one which add power support for MT8365
SoC [1].

Regards,
Alex

[1]: https://lore.kernel.org/linux-arm-kernel/[email protected]/

Signed-off-by: Alexandre Mergnat <[email protected]>
---
Changes in v6:
- Reword "AIoT" to "IoT" in the commit messages.
- Link to v5: https://lore.kernel.org/r/[email protected]

Changes in v5:
- Rebase to v6.6-rc2.
- Link to v4: https://lore.kernel.org/r/[email protected]

Changes in v4:
- Rebase to v6.5-rc1.
- Link to v3: https://lore.kernel.org/r/[email protected]

Changes in v3:
- SMI driver support and bindings patches have been removed from
this series and sent it in another one which should be merged before
this one.
- "dt-bindings: memory-controllers: mediatek,smi-larb: add mt8365"
- "dt-bindings: memory-controllers: mediatek,smi-common: add mt8365"
- "memory: mtk-smi: mt8365: Add SMI Support"
- Link to v2: https://lore.kernel.org/r/[email protected]

Changes in v2:
- Split power domain patch (3) in 4 patches to explain in the commit
messages the added subsystems.
- Add an independent "mediatek,mt8365-smi-common" compatible to have
its own LARB bus select.
- Link to v1: https://lore.kernel.org/r/[email protected]

---
Alexandre Mergnat (7):
arm64: dts: mediatek: add mmsys support for mt8365 SoC
arm64: dts: mediatek: add camsys support for mt8365 SoC
arm64: dts: mediatek: add apu support for mt8365 SoC
arm64: dts: mediatek: add power domain support for mt8365 SoC
arm64: dts: mediatek: add smi support for mt8365 SoC
arm64: dts: mediatek: add larb support for mt8365 SoC
arm64: dts: mediatek: add iommu support for mt8365 SoC

arch/arm64/boot/dts/mediatek/mt8365.dtsi | 210 +++++++++++++++++++++++++++++++
1 file changed, 210 insertions(+)
---
base-commit: 2b4f840a1de65d77644236c72b3f252aa2725a42
change-id: 20230207-iommu-support-5e620926e42e

Best regards,
--
Alexandre Mergnat <[email protected]>


2023-09-26 02:37:08

by Alexandre Mergnat

[permalink] [raw]
Subject: [PATCH v6 6/7] arm64: dts: mediatek: add larb support for mt8365 SoC

Local arbiter (LARB) is a component of Smart Multimedia Interface (SMI),
used to help the memory management (IOMMU).
This patch add 4 LARBs and 2 clocks for the larb1 and larb3 support.

Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Signed-off-by: Alexandre Mergnat <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 59 ++++++++++++++++++++++++++++++++
1 file changed, 59 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
index a03b8c0da68b..afcfa1dd242e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
@@ -735,12 +735,71 @@ smi_common: smi@14002000 {
power-domains = <&spm MT8365_POWER_DOMAIN_MM>;
};

+ larb0: larb@14003000 {
+ compatible = "mediatek,mt8365-smi-larb",
+ "mediatek,mt8186-smi-larb";
+ reg = <0 0x14003000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ clocks = <&mmsys CLK_MM_MM_SMI_LARB0>,
+ <&mmsys CLK_MM_MM_SMI_LARB0>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8365_POWER_DOMAIN_MM>;
+ mediatek,larb-id = <0>;
+ };
+
camsys: syscon@15000000 {
compatible = "mediatek,mt8365-imgsys", "syscon";
reg = <0 0x15000000 0 0x1000>;
#clock-cells = <1>;
};

+ larb2: larb@15001000 {
+ compatible = "mediatek,mt8365-smi-larb",
+ "mediatek,mt8186-smi-larb";
+ reg = <0 0x15001000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ clocks = <&mmsys CLK_MM_MM_SMI_IMG>,
+ <&camsys CLK_CAM_LARB2>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8365_POWER_DOMAIN_CAM>;
+ mediatek,larb-id = <2>;
+ };
+
+ vdecsys: syscon@16000000 {
+ compatible = "mediatek,mt8365-vdecsys", "syscon";
+ reg = <0 0x16000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ larb3: larb@16010000 {
+ compatible = "mediatek,mt8365-smi-larb",
+ "mediatek,mt8186-smi-larb";
+ reg = <0 0x16010000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ clocks = <&vdecsys CLK_VDEC_LARB1>,
+ <&vdecsys CLK_VDEC_LARB1>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8365_POWER_DOMAIN_VDEC>;
+ mediatek,larb-id = <3>;
+ };
+
+ vencsys: syscon@17000000 {
+ compatible = "mediatek,mt8365-vencsys", "syscon";
+ reg = <0 0x17000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ larb1: larb@17010000 {
+ compatible = "mediatek,mt8365-smi-larb",
+ "mediatek,mt8186-smi-larb";
+ reg = <0 0x17010000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ clocks = <&vencsys CLK_VENC>, <&vencsys CLK_VENC>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8365_POWER_DOMAIN_VENC>;
+ mediatek,larb-id = <1>;
+ };
+
apu: syscon@19020000 {
compatible = "mediatek,mt8365-apu", "syscon";
reg = <0 0x19020000 0 0x1000>;

--
2.25.1

2023-09-26 02:51:22

by Alexandre Mergnat

[permalink] [raw]
Subject: [PATCH v6 2/7] arm64: dts: mediatek: add camsys support for mt8365 SoC

Camera System (CamSys) incorporates an enhanced feature based image
signal processor to connect a variety of image sensor components. This
processor consists of timing generated unit (TG), lens/sensor
compensation unit and image process unit.

For more detail, ask Mediatek for the MT8365 IoT application processor
functional specification.

Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Signed-off-by: Alexandre Mergnat <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
index bcabc2b89a94..f9cddce5bd9d 100644
--- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
@@ -609,6 +609,12 @@ mmsys: syscon@14000000 {
reg = <0 0x14000000 0 0x1000>;
#clock-cells = <1>;
};
+
+ camsys: syscon@15000000 {
+ compatible = "mediatek,mt8365-imgsys", "syscon";
+ reg = <0 0x15000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
};

timer {

--
2.25.1