This small series adds support for the PMU in Apple M2 cores. The PMU
itself appears to work in the same way as om M1. We still want to add
CPU type specific compatible strings so that we can distinguish counters
in the case they count (slightly) different things on different CPU
uarchs.
Signed-off-by: Janne Grunau <[email protected]>
---
Janne Grunau (2):
dt-bindings: arm-pmu: Add PMU compatible strings for Apple M2 cores
drivers/perf: apple_m1: Add Apple M2 support
Documentation/devicetree/bindings/arm/pmu.yaml | 2 ++
drivers/perf/apple_m1_cpu_pmu.c | 14 ++++++++++++++
2 files changed, 16 insertions(+)
---
base-commit: 1b929c02afd37871d5afb9d498426f83432e71c2
change-id: 20230214-apple_m2_pmu-175b75c74d4e
Best regards,
--
Janne Grunau <[email protected]>
The PMUs on the Apple M2 cores avalanche and blizzard CPU are compatible
with M1 ones. As on M1 we don't know exactly what the counters count so
use a distinct compatible for each micro-architecture.
Apple's PMU counter description omits a counter for M2 so there
is some variation on the interpretation of the counters.
Signed-off-by: Janne Grunau <[email protected]>
---
Documentation/devicetree/bindings/arm/pmu.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml
index dbb6f3dc5ae5..e14358bf0b9c 100644
--- a/Documentation/devicetree/bindings/arm/pmu.yaml
+++ b/Documentation/devicetree/bindings/arm/pmu.yaml
@@ -20,6 +20,8 @@ properties:
items:
- enum:
- apm,potenza-pmu
+ - apple,avalanche-pmu
+ - apple,blizzard-pmu
- apple,firestorm-pmu
- apple,icestorm-pmu
- arm,armv8-pmuv3 # Only for s/w models
--
2.39.1
The PMU itself is compatible with the one found on M1. We still know
next to nothing about the counters so keep using CPU uarch specific
compatibles/PMU names.
Signed-off-by: Janne Grunau <[email protected]>
---
drivers/perf/apple_m1_cpu_pmu.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/perf/apple_m1_cpu_pmu.c b/drivers/perf/apple_m1_cpu_pmu.c
index 979a7c2b4f56..83b74c7fe63f 100644
--- a/drivers/perf/apple_m1_cpu_pmu.c
+++ b/drivers/perf/apple_m1_cpu_pmu.c
@@ -559,7 +559,21 @@ static int m1_pmu_fire_init(struct arm_pmu *cpu_pmu)
return m1_pmu_init(cpu_pmu);
}
+static int m2_pmu_avalanche_init(struct arm_pmu *cpu_pmu)
+{
+ cpu_pmu->name = "apple_avalanche_pmu";
+ return m1_pmu_init(cpu_pmu);
+}
+
+static int m2_pmu_blizzard_init(struct arm_pmu *cpu_pmu)
+{
+ cpu_pmu->name = "apple_blizzard_pmu";
+ return m1_pmu_init(cpu_pmu);
+}
+
static const struct of_device_id m1_pmu_of_device_ids[] = {
+ { .compatible = "apple,avalanche-pmu", .data = m2_pmu_avalanche_init, },
+ { .compatible = "apple,blizzard-pmu", .data = m2_pmu_blizzard_init, },
{ .compatible = "apple,icestorm-pmu", .data = m1_pmu_ice_init, },
{ .compatible = "apple,firestorm-pmu", .data = m1_pmu_fire_init, },
{ },
--
2.39.1
On 14/02/2023 19.38, Janne Grunau wrote:
> This small series adds support for the PMU in Apple M2 cores. The PMU
> itself appears to work in the same way as om M1. We still want to add
> CPU type specific compatible strings so that we can distinguish counters
> in the case they count (slightly) different things on different CPU
> uarchs.
>
> Signed-off-by: Janne Grunau <[email protected]>
> ---
> Janne Grunau (2):
> dt-bindings: arm-pmu: Add PMU compatible strings for Apple M2 cores
> drivers/perf: apple_m1: Add Apple M2 support
>
> Documentation/devicetree/bindings/arm/pmu.yaml | 2 ++
> drivers/perf/apple_m1_cpu_pmu.c | 14 ++++++++++++++
> 2 files changed, 16 insertions(+)
> ---
> base-commit: 1b929c02afd37871d5afb9d498426f83432e71c2
> change-id: 20230214-apple_m2_pmu-175b75c74d4e
For the series,
Reviewed-by: Hector Martin <[email protected]>
- Hector
On Tue, 14 Feb 2023 11:38:01 +0100, Janne Grunau wrote:
> The PMUs on the Apple M2 cores avalanche and blizzard CPU are compatible
> with M1 ones. As on M1 we don't know exactly what the counters count so
> use a distinct compatible for each micro-architecture.
> Apple's PMU counter description omits a counter for M2 so there
> is some variation on the interpretation of the counters.
>
> Signed-off-by: Janne Grunau <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/pmu.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring <[email protected]>
On Tue, Feb 14, 2023 at 11:38:02AM +0100, Janne Grunau wrote:
> The PMU itself is compatible with the one found on M1. We still know
> next to nothing about the counters so keep using CPU uarch specific
> compatibles/PMU names.
>
> Signed-off-by: Janne Grunau <[email protected]>
Acked-by: Mark Rutland <[email protected].
Will, I assume that you'll pick this up.
> ---
> drivers/perf/apple_m1_cpu_pmu.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/drivers/perf/apple_m1_cpu_pmu.c b/drivers/perf/apple_m1_cpu_pmu.c
> index 979a7c2b4f56..83b74c7fe63f 100644
> --- a/drivers/perf/apple_m1_cpu_pmu.c
> +++ b/drivers/perf/apple_m1_cpu_pmu.c
> @@ -559,7 +559,21 @@ static int m1_pmu_fire_init(struct arm_pmu *cpu_pmu)
> return m1_pmu_init(cpu_pmu);
> }
>
> +static int m2_pmu_avalanche_init(struct arm_pmu *cpu_pmu)
> +{
> + cpu_pmu->name = "apple_avalanche_pmu";
> + return m1_pmu_init(cpu_pmu);
> +}
> +
> +static int m2_pmu_blizzard_init(struct arm_pmu *cpu_pmu)
> +{
> + cpu_pmu->name = "apple_blizzard_pmu";
> + return m1_pmu_init(cpu_pmu);
> +}
> +
> static const struct of_device_id m1_pmu_of_device_ids[] = {
> + { .compatible = "apple,avalanche-pmu", .data = m2_pmu_avalanche_init, },
> + { .compatible = "apple,blizzard-pmu", .data = m2_pmu_blizzard_init, },
> { .compatible = "apple,icestorm-pmu", .data = m1_pmu_ice_init, },
> { .compatible = "apple,firestorm-pmu", .data = m1_pmu_fire_init, },
> { },
>
> --
> 2.39.1
>
On Tue, 14 Feb 2023 11:38:00 +0100, Janne Grunau wrote:
> This small series adds support for the PMU in Apple M2 cores. The PMU
> itself appears to work in the same way as om M1. We still want to add
> CPU type specific compatible strings so that we can distinguish counters
> in the case they count (slightly) different things on different CPU
> uarchs.
>
>
> [...]
Applied to will (for-next/perf), thanks!
[1/2] dt-bindings: arm-pmu: Add PMU compatible strings for Apple M2 cores
https://git.kernel.org/will/c/640a3b7a3d13
[2/2] drivers/perf: apple_m1: Add Apple M2 support
https://git.kernel.org/will/c/7d0bfb7c9977
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev