2023-02-17 09:40:14

by Serge Semin

Subject: [PATCH 01/11] PCI: dwc: Fix port link CSR improper init if CDM check enabled

If CDM_CHECK capability is set then the local variable 'val' will be
overwritten in the dw_pcie_setup() method in the PL_CHK register
initialization procedure. Thus further variable usage in the framework of
the PCIE_PORT_LINK_CONTROL register initialization must imply the variable
re-initialization. Alas it hasn't been taken into account in the
commit ec7b952f453c ("PCI: dwc: Always enable CDM check if
"snps,enable-cdm-check" exists"). Due to that the PCIE_PORT_LINK_CONTROL
register will be written with improper value in case if the CDM-check is
enabled. Let's fix this by re-initializing the 'val' variable with the
PCIE_PORT_LINK_CONTROL CSR content before link-mode initialization.

Fixes: ec7b952f453c ("PCI: dwc: Always enable CDM check if "snps,enable-cdm-check" exists")
Signed-off-by: Serge Semin <[email protected]>
---
drivers/pci/controller/dwc/pcie-designware.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 6d5d619ab2e9..3bb9ca14fb9c 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -824,6 +824,7 @@ void dw_pcie_setup(struct dw_pcie *pci)
}

/* Set the number of lanes */
+ val = dw_pcie_readl_dbi(pci, PCIE_PORT_LINK_CONTROL);
val &= ~PORT_LINK_FAST_LINK_MODE;
val &= ~PORT_LINK_MODE_MASK;
switch (pci->num_lanes) {
--
2.39.0

2023-02-17 10:19:22

by Serge Semin

Subject: Re: [PATCH 01/11] PCI: dwc: Fix port link CSR improper init if CDM check enabled

On Fri, Feb 17, 2023 at 12:39:46PM +0300, Serge Semin wrote:
> If CDM_CHECK capability is set then the local variable 'val' will be
> overwritten in the dw_pcie_setup() method in the PL_CHK register
> initialization procedure. Thus further variable usage in the framework of
> the PCIE_PORT_LINK_CONTROL register initialization must imply the variable
> re-initialization. Alas it hasn't been taken into account in the
> commit ec7b952f453c ("PCI: dwc: Always enable CDM check if
> "snps,enable-cdm-check" exists"). Due to that the PCIE_PORT_LINK_CONTROL
> register will be written with improper value in case if the CDM-check is
> enabled. Let's fix this by re-initializing the 'val' variable with the
> PCIE_PORT_LINK_CONTROL CSR content before link-mode initialization.
>
> Fixes: ec7b952f453c ("PCI: dwc: Always enable CDM check if "snps,enable-cdm-check" exists")
> Signed-off-by: Serge Semin <[email protected]>

The same fix was submitted by Yoshihiro a bit earlier:
https://lore.kernel.org/linux-pci/[email protected]/
I've preserved my version of the patch in the series to ease the merge
procedure since the later patch in this patchset may cause conflicts.

-Serge(y)

> ---
> drivers/pci/controller/dwc/pcie-designware.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index 6d5d619ab2e9..3bb9ca14fb9c 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -824,6 +824,7 @@ void dw_pcie_setup(struct dw_pcie *pci)
> }
>
> /* Set the number of lanes */
> + val = dw_pcie_readl_dbi(pci, PCIE_PORT_LINK_CONTROL);
> val &= ~PORT_LINK_FAST_LINK_MODE;
> val &= ~PORT_LINK_MODE_MASK;
> switch (pci->num_lanes) {
> --
> 2.39.0
>
>