This patch series adds dma support for the StarFive JH7110 RISC-V SoC.
The first patch adds device tree binding. The second patch includes dma
driver. The last patch adds device node of dma to JH7110 dts.
The series has been tested on the VisionFive 2 board which equip with
JH7110 SoC and works normally.
The last patch should be applied after the following patchset:
https://lore.kernel.org/all/[email protected]/
Changes since v1:
- Rebased on Linux 6.2.
- Changed the compatible string to SoC specific and dropped '-rst' from
reset-names in the dt-binding.
- Dropped 'snps,num-hs-if' in the dt-binding.
- Use different configuration on CH_CFG registers according to the compatible string.
v1: https://lore.kernel.org/all/[email protected]/
Walker Chen (3):
dt-bindings: dma: snps,dw-axi-dmac: Add reset items
dmaengine: dw-axi-dmac: Add support for StarFive JH7110 DMA
riscv: dts: starfive: add dma controller node
.../bindings/dma/snps,dw-axi-dmac.yaml | 8 +++++++-
arch/riscv/boot/dts/starfive/jh7110.dtsi | 19 +++++++++++++++++++
.../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 19 +++++++++++++++++--
drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 3 +++
4 files changed, 46 insertions(+), 3 deletions(-)
base-commit: c9c3395d5e3dcc6daee66c6908354d47bf98cb0c
prerequisite-patch-id: 54ce870d6ea747466474b5d4105cfbc05e1b01ab
prerequisite-patch-id: ac150a8c622e858e088df8121093d448df49c245
prerequisite-patch-id: 044263ef2fb9f1e5a586edbf85d5f67814a28430
prerequisite-patch-id: 057fa35870d8d7d22a57c13362588ffb9e9df316
prerequisite-patch-id: 848332ca483b026a755639b9eefb0bf8f3fcf8be
prerequisite-patch-id: 1b2d0982b18da060c82134f05bf3ce16425bac8d
prerequisite-patch-id: 090ba4b78d47bc19204916e76fdbc70021785388
prerequisite-patch-id: a5d9e0f7d4f8163f566678894cf693015119f2d9
prerequisite-patch-id: 87cb528acd9a7f1ffe7475d7261553f6a4de5753
prerequisite-patch-id: 417736eb958e1158c60a5ed74bc2350394321a80
prerequisite-patch-id: ff9fe0b043a5f7f74a1f6af5cebc4793c6f14ce7
prerequisite-patch-id: 290602062703e666191c20ca02f2840471a6bf4f
prerequisite-patch-id: f0b29adbb18edffbfeec7292c5f33e2bbeb30945
prerequisite-patch-id: fccfad539d8455777988b709171ad97729e1a97c
prerequisite-patch-id: 929ebaffab0df158ea801661d0da74e8b5ef138c
prerequisite-patch-id: 0d9ddcaa8a867fcbc790b41d6d0349796e0c44b0
prerequisite-patch-id: 5f539ac7c96023b36489c6da7c70c31eaf64a25b
prerequisite-patch-id: 65f2aed865d88e6fa468d2923527b523d4313857
prerequisite-patch-id: 258ea5f9b8bf41b6981345dcc81795f25865d38f
prerequisite-patch-id: 8b6f2c9660c0ac0ee4e73e4c21aca8e6b75e81b9
prerequisite-patch-id: e3b986b9c60b2b93b7812ec174c9e1b4cfb14c97
prerequisite-patch-id: 2e03eeb766aefd5d38f132d091618e9fa19a37b6
prerequisite-patch-id: dbb0c0151b8bdf093e6ce79fd2fe3f60791a6e0b
prerequisite-patch-id: ea9a6d0313dd3936c8de0239dc2072c3360a2f6b
prerequisite-patch-id: d57e95d31686772abc4c4d5aa1cadc344dc293cd
prerequisite-patch-id: 602c3cf8f42c8c88125defa0a8a301da51f8af49
prerequisite-patch-id: 82d2d2bc302045505a51f4ab2bf607a904d4b2d1
prerequisite-patch-id: a6df0f7d8fc2d534c06d85f17578c9134913d01b
prerequisite-patch-id: 2ddada18ab6ea5cd1da14212aaf59632f5203d40
prerequisite-patch-id: b9b8fda5e8cd2dd4c9101ec03f4c8fb8e8caa573
prerequisite-patch-id: 7acbc9c924e802712d3574dd74a6b3576089f78c
prerequisite-patch-id: f9ce88e490c2473c3c94ad63fa26bc91829ce2cc
prerequisite-patch-id: ce8a6557564ba04bd90bb41d34f520347f399887
prerequisite-patch-id: 9f71c539a241baf1e73c7e7dfde5b0b04c66a502
prerequisite-patch-id: 378a6ccc643a8bf51918cdd61876af813564c638
prerequisite-patch-id: bb8e071ed43998874b9d98292c0dcdeedc0760ca
prerequisite-patch-id: 0c04762f1d20f09cd2a1356334a86e520907d111
prerequisite-patch-id: 8867ef35e4d555491a97106db7834149309426b7
prerequisite-patch-id: e5a319ba557c8165f7620e574c79ff2ad3be1f65
prerequisite-patch-id: 2bc43b375b470f7e8bbe937b78678ba3856e3b8f
--
2.17.1
Add DMA reset operation in device probe and use different configuration
on CH_CFG registers according to compatible string.
Signed-off-by: Walker Chen <[email protected]>
---
.../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 19 +++++++++++++++++--
drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 3 +++
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index bf85aa0979ec..858c4337650f 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -25,6 +25,7 @@
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/property.h>
+#include <linux/reset.h>
#include <linux/slab.h>
#include <linux/types.h>
@@ -86,7 +87,8 @@ static inline void axi_chan_config_write(struct axi_dma_chan *chan,
cfg_lo = (config->dst_multblk_type << CH_CFG_L_DST_MULTBLK_TYPE_POS |
config->src_multblk_type << CH_CFG_L_SRC_MULTBLK_TYPE_POS);
- if (chan->chip->dw->hdata->reg_map_8_channels) {
+ if (chan->chip->dw->hdata->reg_map_8_channels &&
+ !chan->chip->dw->hdata->use_cfg2) {
cfg_hi = config->tt_fc << CH_CFG_H_TT_FC_POS |
config->hs_sel_src << CH_CFG_H_HS_SEL_SRC_POS |
config->hs_sel_dst << CH_CFG_H_HS_SEL_DST_POS |
@@ -1142,7 +1144,7 @@ static int dma_chan_terminate_all(struct dma_chan *dchan)
axi_chan_disable(chan);
ret = readl_poll_timeout_atomic(chan->chip->regs + DMAC_CHEN, val,
- !(val & chan_active), 1000, 10000);
+ !(val & chan_active), 1000, DMAC_TIMEOUT_US);
if (ret == -ETIMEDOUT)
dev_warn(dchan2dev(dchan),
"%s failed to stop\n", axi_chan_name(chan));
@@ -1416,6 +1418,18 @@ static int dw_probe(struct platform_device *pdev)
if (IS_ERR(chip->cfgr_clk))
return PTR_ERR(chip->cfgr_clk);
+ if (of_device_is_compatible(node, "starfive,jh7110-axi-dma")) {
+ chip->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
+ if (IS_ERR(chip->resets))
+ return PTR_ERR(chip->resets);
+
+ ret = reset_control_deassert(chip->resets);
+ if (ret)
+ return ret;
+
+ chip->dw->hdata->use_cfg2 = true;
+ }
+
ret = parse_device_properties(chip);
if (ret)
return ret;
@@ -1560,6 +1574,7 @@ static const struct dev_pm_ops dw_axi_dma_pm_ops = {
static const struct of_device_id dw_dma_of_id_table[] = {
{ .compatible = "snps,axi-dma-1.01a" },
{ .compatible = "intel,kmb-axi-dma" },
+ { .compatible = "starfive,jh7110-axi-dma" },
{}
};
MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
index e9d5eb0fd594..761d95691c02 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
@@ -21,6 +21,7 @@
#define DMAC_MAX_CHANNELS 16
#define DMAC_MAX_MASTERS 2
#define DMAC_MAX_BLK_SIZE 0x200000
+#define DMAC_TIMEOUT_US 200000
struct dw_axi_dma_hcfg {
u32 nr_channels;
@@ -33,6 +34,7 @@ struct dw_axi_dma_hcfg {
/* Register map for DMAX_NUM_CHANNELS <= 8 */
bool reg_map_8_channels;
bool restrict_axi_burst_len;
+ bool use_cfg2;
};
struct axi_dma_chan {
@@ -70,6 +72,7 @@ struct axi_dma_chip {
struct clk *core_clk;
struct clk *cfgr_clk;
struct dw_axi_dma *dw;
+ struct reset_control *resets;
};
/* LLI == Linked List Item */
--
2.17.1
Add the dma controller node for the Starfive JH7110 SoC.
Signed-off-by: Walker Chen <[email protected]>
---
arch/riscv/boot/dts/starfive/jh7110.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 697ab59191a1..c30fe4239285 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -510,6 +510,25 @@
#gpio-cells = <2>;
};
+ dma: dma-controller@16050000 {
+ compatible = "starfive,jh7110-axi-dma";
+ reg = <0x0 0x16050000 0x0 0x10000>;
+ clocks = <&stgcrg JH7110_STGCLK_DMA1P_AXI>,
+ <&stgcrg JH7110_STGCLK_DMA1P_AHB>;
+ clock-names = "core-clk", "cfgr-clk";
+ resets = <&stgcrg JH7110_STGRST_DMA1P_AXI>,
+ <&stgcrg JH7110_STGRST_DMA1P_AHB>;
+ reset-names = "axi", "ahb";
+ interrupts = <73>;
+ #dma-cells = <1>;
+ dma-channels = <4>;
+ snps,dma-masters = <1>;
+ snps,data-width = <3>;
+ snps,block-size = <65536 65536 65536 65536>;
+ snps,priority = <0 1 2 3>;
+ snps,axi-max-burst-len = <16>;
+ };
+
aoncrg: clock-controller@17000000 {
compatible = "starfive,jh7110-aoncrg";
reg = <0x0 0x17000000 0x0 0x10000>;
--
2.17.1
On Tue, 21 Feb 2023 at 15:04, Walker Chen <[email protected]> wrote:
>
> Add DMA reset operation in device probe and use different configuration
> on CH_CFG registers according to compatible string.
>
> Signed-off-by: Walker Chen <[email protected]>
> ---
> .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 19 +++++++++++++++++--
> drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 3 +++
> 2 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> index bf85aa0979ec..858c4337650f 100644
> --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> @@ -25,6 +25,7 @@
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> #include <linux/property.h>
> +#include <linux/reset.h>
> #include <linux/slab.h>
> #include <linux/types.h>
>
> @@ -86,7 +87,8 @@ static inline void axi_chan_config_write(struct axi_dma_chan *chan,
>
> cfg_lo = (config->dst_multblk_type << CH_CFG_L_DST_MULTBLK_TYPE_POS |
> config->src_multblk_type << CH_CFG_L_SRC_MULTBLK_TYPE_POS);
> - if (chan->chip->dw->hdata->reg_map_8_channels) {
> + if (chan->chip->dw->hdata->reg_map_8_channels &&
> + !chan->chip->dw->hdata->use_cfg2) {
> cfg_hi = config->tt_fc << CH_CFG_H_TT_FC_POS |
> config->hs_sel_src << CH_CFG_H_HS_SEL_SRC_POS |
> config->hs_sel_dst << CH_CFG_H_HS_SEL_DST_POS |
> @@ -1142,7 +1144,7 @@ static int dma_chan_terminate_all(struct dma_chan *dchan)
> axi_chan_disable(chan);
>
> ret = readl_poll_timeout_atomic(chan->chip->regs + DMAC_CHEN, val,
> - !(val & chan_active), 1000, 10000);
> + !(val & chan_active), 1000, DMAC_TIMEOUT_US);
> if (ret == -ETIMEDOUT)
> dev_warn(dchan2dev(dchan),
> "%s failed to stop\n", axi_chan_name(chan));
> @@ -1416,6 +1418,18 @@ static int dw_probe(struct platform_device *pdev)
> if (IS_ERR(chip->cfgr_clk))
> return PTR_ERR(chip->cfgr_clk);
>
> + if (of_device_is_compatible(node, "starfive,jh7110-axi-dma")) {
> + chip->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
> + if (IS_ERR(chip->resets))
> + return PTR_ERR(chip->resets);
> +
> + ret = reset_control_deassert(chip->resets);
> + if (ret)
> + return ret;
> +
> + chip->dw->hdata->use_cfg2 = true;
> + }
> +
In the future it would be great to use match data rather than all the
calls to of_device_is_compatible.
> ret = parse_device_properties(chip);
> if (ret)
> return ret;
> @@ -1560,6 +1574,7 @@ static const struct dev_pm_ops dw_axi_dma_pm_ops = {
> static const struct of_device_id dw_dma_of_id_table[] = {
> { .compatible = "snps,axi-dma-1.01a" },
> { .compatible = "intel,kmb-axi-dma" },
> + { .compatible = "starfive,jh7110-axi-dma" },
> {}
> };
> MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
> diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
> index e9d5eb0fd594..761d95691c02 100644
> --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
> +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
> @@ -21,6 +21,7 @@
> #define DMAC_MAX_CHANNELS 16
> #define DMAC_MAX_MASTERS 2
> #define DMAC_MAX_BLK_SIZE 0x200000
> +#define DMAC_TIMEOUT_US 200000
>
> struct dw_axi_dma_hcfg {
> u32 nr_channels;
> @@ -33,6 +34,7 @@ struct dw_axi_dma_hcfg {
> /* Register map for DMAX_NUM_CHANNELS <= 8 */
> bool reg_map_8_channels;
> bool restrict_axi_burst_len;
> + bool use_cfg2;
> };
>
> struct axi_dma_chan {
> @@ -70,6 +72,7 @@ struct axi_dma_chip {
> struct clk *core_clk;
> struct clk *cfgr_clk;
> struct dw_axi_dma *dw;
> + struct reset_control *resets;
This added field only seems to be written, but not read from anywhere.
With that fixed:
Reviewed-by: Emil Renner Berthing <[email protected]>
> };
>
> /* LLI == Linked List Item */
> --
> 2.17.1
>
On 2023/2/26 22:25, Emil Renner Berthing wrote:
> On Tue, 21 Feb 2023 at 15:04, Walker Chen <[email protected]> wrote:
>>
>> Add DMA reset operation in device probe and use different configuration
>> on CH_CFG registers according to compatible string.
>>
>> Signed-off-by: Walker Chen <[email protected]>
>> ---
>> .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 19 +++++++++++++++++--
>> drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 3 +++
>> 2 files changed, 20 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
>> index bf85aa0979ec..858c4337650f 100644
>> --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
>> +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
>> @@ -25,6 +25,7 @@
>> #include <linux/platform_device.h>
>> #include <linux/pm_runtime.h>
>> #include <linux/property.h>
>> +#include <linux/reset.h>
>> #include <linux/slab.h>
>> #include <linux/types.h>
>>
>> @@ -86,7 +87,8 @@ static inline void axi_chan_config_write(struct axi_dma_chan *chan,
>>
>> cfg_lo = (config->dst_multblk_type << CH_CFG_L_DST_MULTBLK_TYPE_POS |
>> config->src_multblk_type << CH_CFG_L_SRC_MULTBLK_TYPE_POS);
>> - if (chan->chip->dw->hdata->reg_map_8_channels) {
>> + if (chan->chip->dw->hdata->reg_map_8_channels &&
>> + !chan->chip->dw->hdata->use_cfg2) {
>> cfg_hi = config->tt_fc << CH_CFG_H_TT_FC_POS |
>> config->hs_sel_src << CH_CFG_H_HS_SEL_SRC_POS |
>> config->hs_sel_dst << CH_CFG_H_HS_SEL_DST_POS |
>> @@ -1142,7 +1144,7 @@ static int dma_chan_terminate_all(struct dma_chan *dchan)
>> axi_chan_disable(chan);
>>
>> ret = readl_poll_timeout_atomic(chan->chip->regs + DMAC_CHEN, val,
>> - !(val & chan_active), 1000, 10000);
>> + !(val & chan_active), 1000, DMAC_TIMEOUT_US);
>> if (ret == -ETIMEDOUT)
>> dev_warn(dchan2dev(dchan),
>> "%s failed to stop\n", axi_chan_name(chan));
>> @@ -1416,6 +1418,18 @@ static int dw_probe(struct platform_device *pdev)
>> if (IS_ERR(chip->cfgr_clk))
>> return PTR_ERR(chip->cfgr_clk);
>>
>> + if (of_device_is_compatible(node, "starfive,jh7110-axi-dma")) {
>> + chip->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
>> + if (IS_ERR(chip->resets))
>> + return PTR_ERR(chip->resets);
>> +
>> + ret = reset_control_deassert(chip->resets);
>> + if (ret)
>> + return ret;
>> +
>> + chip->dw->hdata->use_cfg2 = true;
>> + }
>> +
>
> In the future it would be great to use match data rather than all the
> calls to of_device_is_compatible.
Thanks, about this point, I will follow your advice.
>
>> ret = parse_device_properties(chip);
>> if (ret)
>> return ret;
>> @@ -1560,6 +1574,7 @@ static const struct dev_pm_ops dw_axi_dma_pm_ops = {
>> static const struct of_device_id dw_dma_of_id_table[] = {
>> { .compatible = "snps,axi-dma-1.01a" },
>> { .compatible = "intel,kmb-axi-dma" },
>> + { .compatible = "starfive,jh7110-axi-dma" },
>> {}
>> };
>> MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
>> diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
>> index e9d5eb0fd594..761d95691c02 100644
>> --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
>> +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
>> @@ -21,6 +21,7 @@
>> #define DMAC_MAX_CHANNELS 16
>> #define DMAC_MAX_MASTERS 2
>> #define DMAC_MAX_BLK_SIZE 0x200000
>> +#define DMAC_TIMEOUT_US 200000
>>
>> struct dw_axi_dma_hcfg {
>> u32 nr_channels;
>> @@ -33,6 +34,7 @@ struct dw_axi_dma_hcfg {
>> /* Register map for DMAX_NUM_CHANNELS <= 8 */
>> bool reg_map_8_channels;
>> bool restrict_axi_burst_len;
>> + bool use_cfg2;
>> };
>>
>> struct axi_dma_chan {
>> @@ -70,6 +72,7 @@ struct axi_dma_chip {
>> struct clk *core_clk;
>> struct clk *cfgr_clk;
>> struct dw_axi_dma *dw;
>> + struct reset_control *resets;
>
> This added field only seems to be written, but not read from anywhere.
Reset initialization will be encapsulated in match data.
> With that fixed:
>
> Reviewed-by: Emil Renner Berthing <[email protected]>
Thanks for your review and comment very much!
Best regards,
Walker