Convert xilinx-spi bindings to DT schema format using json-schema
Signed-off-by: Nava kishore Manne <[email protected]>
---
.../bindings/fpga/xilinx-slave-serial.txt | 51 ------------
.../bindings/fpga/xlnx,fpga-slave-serial.yaml | 77 +++++++++++++++++++
2 files changed, 77 insertions(+), 51 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt
create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,fpga-slave-serial.yaml
diff --git a/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt
deleted file mode 100644
index 5ef659c1394d..000000000000
--- a/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt
+++ /dev/null
@@ -1,51 +0,0 @@
-Xilinx Slave Serial SPI FPGA Manager
-
-Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the
-bitstream over what is referred to as "slave serial" interface.
-The slave serial link is not technically SPI, and might require extra
-circuits in order to play nicely with other SPI slaves on the same bus.
-
-See:
-- https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
-- https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
-- https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf
-
-Required properties:
-- compatible: should contain "xlnx,fpga-slave-serial"
-- reg: spi chip select of the FPGA
-- prog_b-gpios: config pin (referred to as PROGRAM_B in the manual)
-- done-gpios: config status pin (referred to as DONE in the manual)
-
-Optional properties:
-- init-b-gpios: initialization status and configuration error pin
- (referred to as INIT_B in the manual)
-
-Example for full FPGA configuration:
-
- fpga-region0 {
- compatible = "fpga-region";
- fpga-mgr = <&fpga_mgr_spi>;
- #address-cells = <0x1>;
- #size-cells = <0x1>;
- };
-
- spi1: spi@10680 {
- compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
- pinctrl-0 = <&spi0_pins>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- cell-index = <1>;
- interrupts = <92>;
- clocks = <&coreclk 0>;
-
- fpga_mgr_spi: fpga-mgr@0 {
- compatible = "xlnx,fpga-slave-serial";
- spi-max-frequency = <60000000>;
- spi-cpha;
- reg = <0>;
- prog_b-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
- init-b-gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
- done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
- };
- };
diff --git a/Documentation/devicetree/bindings/fpga/xlnx,fpga-slave-serial.yaml b/Documentation/devicetree/bindings/fpga/xlnx,fpga-slave-serial.yaml
new file mode 100644
index 000000000000..a606e1bd1b1d
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/xlnx,fpga-slave-serial.yaml
@@ -0,0 +1,77 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/xlnx,fpga-slave-serial.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx Slave Serial SPI FPGA driver.
+
+maintainers:
+ - Nava kishore Manne <[email protected]>
+
+description: |
+ Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the bitstream
+ over what is referred to as slave serial interface.The slave serial link is
+ not technically SPI, and might require extra circuits in order to play nicely
+ with other SPI slaves on the same bus.
+ Please refer to fpga-region.txt in this directory for common binding part
+ and usage.
+
+ Datasheets:
+ https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
+ https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
+ https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - xlnx,fpga-slave-serial
+
+ spi-cpha: true
+
+ spi-max-frequency:
+ maximum: 60000000
+
+ reg:
+ maxItems: 1
+
+ prog_b-gpios:
+ description:
+ config pin (referred to as PROGRAM_B in the manual)
+
+ done-gpios:
+ description:
+ config status pin (referred to as DONE in the manual)
+
+ init-b-gpios:
+ description:
+ initialization status and configuration error pin
+ (referred to as INIT_B in the manual)
+
+required:
+ - compatible
+ - reg
+ - prog_b-gpios
+ - done-gpios
+ - init-b-gpios
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ fpga_mgr_spi: fpga-mgr@0 {
+ compatible = "xlnx,fpga-slave-serial";
+ spi-max-frequency = <60000000>;
+ spi-cpha;
+ reg = <0>;
+ prog_b-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+ init-b-gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
+ done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+ };
+ };
+...
--
2.25.1
On 24/02/2023 12:37, Nava kishore Manne wrote:
> Convert xilinx-spi bindings to DT schema format using json-schema
Missing full stop.
>
> Signed-off-by: Nava kishore Manne <[email protected]>
> ---
> .../bindings/fpga/xilinx-slave-serial.txt | 51 ------------
> .../bindings/fpga/xlnx,fpga-slave-serial.yaml | 77 +++++++++++++++++++
> 2 files changed, 77 insertions(+), 51 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt
> create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,fpga-slave-serial.yaml
Thank you for your patch. There is something to discuss/improve.
> +++ b/Documentation/devicetree/bindings/fpga/xlnx,fpga-slave-serial.yaml
> @@ -0,0 +1,77 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/fpga/xlnx,fpga-slave-serial.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx Slave Serial SPI FPGA driver.
Drop driver and full stop.
> +
> +maintainers:
> + - Nava kishore Manne <[email protected]>
> +
> +description: |
> + Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the bitstream
> + over what is referred to as slave serial interface.The slave serial link is
> + not technically SPI, and might require extra circuits in order to play nicely
> + with other SPI slaves on the same bus.
> + Please refer to fpga-region.txt in this directory for common binding part
> + and usage.
Just one space, not two. But what exactly from fpga-region comes here?
If it is used, you need to mention it otherwise it's not allowed to be
used...
> +
> + Datasheets:
> + https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
> + https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
> + https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf
> +
Missing allOf to spi-peripheral-props.
> +properties:
> + compatible:
> + items:
No need for items, drop it.
> + - enum:
> + - xlnx,fpga-slave-serial
> +
> + spi-cpha: true
> +
> + spi-max-frequency:
> + maximum: 60000000
> +
> + reg:
> + maxItems: 1
> +
> + prog_b-gpios:
> + description:
> + config pin (referred to as PROGRAM_B in the manual)
maxItems
> +
> + done-gpios:
> + description:
> + config status pin (referred to as DONE in the manual)
maxItems
> +
> + init-b-gpios:
> + description:
> + initialization status and configuration error pin
> + (referred to as INIT_B in the manual)
maxItems
> +
> +required:
> + - compatible
> + - reg
> + - prog_b-gpios
> + - done-gpios
> + - init-b-gpios
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/gpio/gpio.h>
> + spi0 {
spi
> + #address-cells = <1>;
> + #size-cells = <0>;
> + fpga_mgr_spi: fpga-mgr@0 {
> + compatible = "xlnx,fpga-slave-serial";
> + spi-max-frequency = <60000000>;
> + spi-cpha;
> + reg = <0>;
> + prog_b-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
> + init-b-gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
> + done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +...
Best regards,
Krzysztof