Hi,
Couple of misc patches.
AM62x WDT was posted here[1] - So, this would be a resend, dropping the
board level reservation.
Julien Panis (1):
arm64: dts: ti: k3-am62: Add watchdog nodes
Nishanth Menon (1):
arm64: dts: ti: k3-am62-wakeup: Introduce RTC node
arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 45 ++++++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 9 +++++
arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 21 ++++++++++
3 files changed, 75 insertions(+)
[1] https://lore.kernel.org/all/[email protected]/
--
2.37.2
From: Julien Panis <[email protected]>
Add nodes for watchdogs :
- 5 in main domain
- 1 in MCU domain
- 1 in wakeup domain
Signed-off-by: Julien Panis <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
---
Changes since V3:
- Dropped the board level wdt reservation, do that with overlays based on
modifiable firmware dependencies.
V3: https://lore.kernel.org/all/[email protected]/
arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 45 ++++++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 9 +++++
arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 11 ++++++
3 files changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index ea683fd77d6a..90d5f145de4f 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -758,6 +758,51 @@ main_mcan0: can@20701000 {
status = "disabled";
};
+ main_rti0: watchdog@e000000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x0e000000 0x00 0x100>;
+ clocks = <&k3_clks 125 0>;
+ power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 125 0>;
+ assigned-clock-parents = <&k3_clks 125 2>;
+ };
+
+ main_rti1: watchdog@e010000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x0e010000 0x00 0x100>;
+ clocks = <&k3_clks 126 0>;
+ power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 126 0>;
+ assigned-clock-parents = <&k3_clks 126 2>;
+ };
+
+ main_rti2: watchdog@e020000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x0e020000 0x00 0x100>;
+ clocks = <&k3_clks 127 0>;
+ power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 127 0>;
+ assigned-clock-parents = <&k3_clks 127 2>;
+ };
+
+ main_rti3: watchdog@e030000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x0e030000 0x00 0x100>;
+ clocks = <&k3_clks 128 0>;
+ power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 128 0>;
+ assigned-clock-parents = <&k3_clks 128 2>;
+ };
+
+ main_rti4: watchdog@e0f0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x0e0f0000 0x00 0x100>;
+ clocks = <&k3_clks 130 0>;
+ power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 130 0>;
+ assigned-clock-parents = <&k3_clks 130 2>;
+ };
+
epwm0: pwm@23000000 {
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
index a427231527c3..bec118921c4c 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
@@ -130,4 +130,13 @@ mcu_gpio0: gpio@4201000 {
clocks = <&k3_clks 79 0>;
clock-names = "gpio";
};
+
+ mcu_rti0: watchdog@4880000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x04880000 0x00 0x100>;
+ clocks = <&k3_clks 131 0>;
+ power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 131 0>;
+ assigned-clock-parents = <&k3_clks 131 2>;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
index fec81546fbbd..7726ebae2539 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
@@ -50,4 +50,15 @@ wkup_rtc0: rtc@2b1f0000 {
power-domains = <&k3_pds 117 TI_SCI_PD_EXCLUSIVE>;
wakeup-source;
};
+
+ wkup_rti0: watchdog@2b000000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2b000000 0x00 0x100>;
+ clocks = <&k3_clks 132 0>;
+ power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 132 0>;
+ assigned-clock-parents = <&k3_clks 132 2>;
+ /* Used by DM firmware */
+ status = "reserved";
+ };
};
--
2.37.2
On March 11, 2023 thus sayeth Nishanth Menon:
> From: Julien Panis <[email protected]>
>
> Add nodes for watchdogs :
> - 5 in main domain
> - 1 in MCU domain
> - 1 in wakeup domain
>
> Signed-off-by: Julien Panis <[email protected]>
> Signed-off-by: Nishanth Menon <[email protected]>
> ---
> Changes since V3:
> - Dropped the board level wdt reservation, do that with overlays based on
> modifiable firmware dependencies.
>
> V3: https://lore.kernel.org/all/[email protected]/
>
> arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 45 ++++++++++++++++++++++
> arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 9 +++++
> arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 11 ++++++
> 3 files changed, 65 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> index ea683fd77d6a..90d5f145de4f 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> @@ -758,6 +758,51 @@ main_mcan0: can@20701000 {
> status = "disabled";
> };
>
> + main_rti0: watchdog@e000000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x0e000000 0x00 0x100>;
> + clocks = <&k3_clks 125 0>;
> + power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 125 0>;
> + assigned-clock-parents = <&k3_clks 125 2>;
> + };
> +
> + main_rti1: watchdog@e010000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x0e010000 0x00 0x100>;
> + clocks = <&k3_clks 126 0>;
> + power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 126 0>;
> + assigned-clock-parents = <&k3_clks 126 2>;
> + };
> +
> + main_rti2: watchdog@e020000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x0e020000 0x00 0x100>;
> + clocks = <&k3_clks 127 0>;
> + power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 127 0>;
> + assigned-clock-parents = <&k3_clks 127 2>;
> + };
> +
> + main_rti3: watchdog@e030000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x0e030000 0x00 0x100>;
> + clocks = <&k3_clks 128 0>;
> + power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 128 0>;
> + assigned-clock-parents = <&k3_clks 128 2>;
> + };
> +
> + main_rti4: watchdog@e0f0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x0e0f0000 0x00 0x100>;
> + clocks = <&k3_clks 130 0>;
> + power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 130 0>;
> + assigned-clock-parents = <&k3_clks 130 2>;
> + };
> +
This may be a dumb question, though the ti-sci and TRM documentation is
labeling this as rti15? idk if we should label this the same? it might
make grepping a little easier :)
~Bryan
On March 11, 2023 thus sayeth Nishanth Menon:
> Hi,
>
> Couple of misc patches.
>
> AM62x WDT was posted here[1] - So, this would be a resend, dropping the
> board level reservation.
>
> Julien Panis (1):
> arm64: dts: ti: k3-am62: Add watchdog nodes
>
> Nishanth Menon (1):
> arm64: dts: ti: k3-am62-wakeup: Introduce RTC node
>
> arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 45 ++++++++++++++++++++++
> arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 9 +++++
> arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 21 ++++++++++
> 3 files changed, 75 insertions(+)
>
> [1] https://lore.kernel.org/all/[email protected]/
>
The series looks good to me
Reviewed-by: Bryan Brattlof <[email protected]>
~Bryan
On 10:36-20230320, Bryan Brattlof wrote:
> > + main_rti4: watchdog@e0f0000 {
> > + compatible = "ti,j7-rti-wdt";
> > + reg = <0x00 0x0e0f0000 0x00 0x100>;
> > + clocks = <&k3_clks 130 0>;
> > + power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
> > + assigned-clocks = <&k3_clks 130 0>;
> > + assigned-clock-parents = <&k3_clks 130 2>;
> > + };
> > +
>
> This may be a dumb question, though the ti-sci and TRM documentation is
> labeling this as rti15? idk if we should label this the same? it might
> make grepping a little easier :)
Sure, will fix.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D