v2 -> v3:
- Pick up acks
- Fix the "arm,smmu-500" typo in bindings (Rob)
- use b4
v2: https://lore.kernel.org/lkml/[email protected]/T/#md7074966fdcbbd884baf62153f726bec54b2e819
Signed-off-by: Konrad Dybcio <[email protected]>
---
Konrad Dybcio (6):
dt-bindings: arm-smmu: Use qcom,smmu compatible for MMU500 adreno SMMUs
dt-bindings: arm-smmu: Add SM8350 Adreno SMMU
arm64: dts: qcom: sc7280: Add qcom,smmu-500 to Adreno SMMU
arm64: dts: qcom: sm8150: Add qcom,smmu-500 to Adreno SMMU
arm64: dts: qcom: sm8250: Add qcom,smmu-500 to Adreno SMMU
arm64: dts: qcom: sm8350: Add qcom,smmu-500 to Adreno SMMU
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 15 +++++++++++++--
arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 ++-
arch/arm64/boot/dts/qcom/sm8150.dtsi | 3 ++-
arch/arm64/boot/dts/qcom/sm8250.dtsi | 3 ++-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 ++-
5 files changed, 21 insertions(+), 6 deletions(-)
---
base-commit: 24469a0e5052ba01a35a15f104717a82b7a4798b
change-id: 20230313-topic-gpu_smmu_bindings-60af88a662ca
Best regards,
--
Konrad Dybcio <[email protected]>
qcom,smmu-500 was introduced to prevent people from adding new
compatibles for what seems to roughly be the same hardware. Use it for
qcom,adreno-smmu-compatible targets as well.
While at it, fix the "arm,smmu-500" -> "arm,mmu-500" typo in the comment.
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 807cb511fe18..40f91a2e5f3a 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -75,9 +75,19 @@ properties:
- qcom,sm8350-smmu-500
- qcom,sm8450-smmu-500
- const: arm,mmu-500
-
- - description: Qcom Adreno GPUs implementing "arm,smmu-500"
+ - description: Qcom Adreno GPUs implementing "qcom,smmu-500" and "arm,mmu-500"
+ items:
+ - enum:
+ - qcom,sc7280-smmu-500
+ - qcom,sm8150-smmu-500
+ - qcom,sm8250-smmu-500
+ - const: qcom,adreno-smmu
+ - const: qcom,smmu-500
+ - const: arm,mmu-500
+ - description: Qcom Adreno GPUs implementing "arm,mmu-500" (legacy binding)
+ deprecated: true
items:
+ # Do not add additional SoC to this list. Instead use previous list.
- enum:
- qcom,sc7280-smmu-500
- qcom,sm8150-smmu-500
--
2.39.2
Document the Adreno SMMU present on SM8350.
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 40f91a2e5f3a..a6224b7e5310 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -81,6 +81,7 @@ properties:
- qcom,sc7280-smmu-500
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
+ - qcom,sm8350-smmu-500
- const: qcom,adreno-smmu
- const: qcom,smmu-500
- const: arm,mmu-500
--
2.39.2
Add the fallback Qualcomm SMMU500 compatible to the Adreno SMMU.
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 8f4ab6bd2886..5b1f26d433b9 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2679,7 +2679,8 @@ dma@117f000 {
};
adreno_smmu: iommu@3da0000 {
- compatible = "qcom,sc7280-smmu-500", "qcom,adreno-smmu", "arm,mmu-500";
+ compatible = "qcom,sc7280-smmu-500", "qcom,adreno-smmu",
+ "qcom,smmu-500", "arm,mmu-500";
reg = <0 0x03da0000 0 0x20000>;
#iommu-cells = <2>;
#global-interrupts = <2>;
--
2.39.2
Add the fallback Qualcomm SMMU500 compatible to the Adreno SMMU.
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 13e0ce828606..c94765302f1b 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -2249,7 +2249,8 @@ gpucc: clock-controller@2c90000 {
};
adreno_smmu: iommu@2ca0000 {
- compatible = "qcom,sm8150-smmu-500", "qcom,adreno-smmu", "arm,mmu-500";
+ compatible = "qcom,sm8150-smmu-500", "qcom,adreno-smmu",
+ "qcom,smmu-500", "arm,mmu-500";
reg = <0 0x02ca0000 0 0x10000>;
#iommu-cells = <2>;
#global-interrupts = <1>;
--
2.39.2
Add the fallback Qualcomm SMMU500 compatible to the Adreno SMMU.
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 2f0e460acccd..044c8c1c9d48 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2656,7 +2656,8 @@ gpucc: clock-controller@3d90000 {
};
adreno_smmu: iommu@3da0000 {
- compatible = "qcom,sm8250-smmu-500", "qcom,adreno-smmu", "arm,mmu-500";
+ compatible = "qcom,sm8250-smmu-500", "qcom,adreno-smmu",
+ "qcom,smmu-500", "arm,mmu-500";
reg = <0 0x03da0000 0 0x10000>;
#iommu-cells = <2>;
#global-interrupts = <2>;
--
2.39.2
Add the fallback Qualcomm SMMU500 compatible to the Adreno SMMU.
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 1c97e28da6ad..19a6a9785936 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1907,7 +1907,8 @@ gpucc: clock-controller@3d90000 {
};
adreno_smmu: iommu@3da0000 {
- compatible = "qcom,sm8350-smmu-500", "qcom,adreno-smmu", "arm,mmu-500";
+ compatible = "qcom,sm8350-smmu-500", "qcom,adreno-smmu",
+ "qcom,smmu-500", "arm,mmu-500";
reg = <0 0x03da0000 0 0x20000>;
#iommu-cells = <2>;
#global-interrupts = <2>;
--
2.39.2
On Mon, 13 Mar 2023 17:44:15 +0100, Konrad Dybcio wrote:
> v2 -> v3:
> - Pick up acks
> - Fix the "arm,smmu-500" typo in bindings (Rob)
> - use b4
>
> v2: https://lore.kernel.org/lkml/[email protected]/T/#md7074966fdcbbd884baf62153f726bec54b2e819
>
> [...]
Applied bindings changes to will (for-joerg/arm-smmu/bindings), thanks!
[1/6] dt-bindings: arm-smmu: Use qcom,smmu compatible for MMU500 adreno SMMUs
https://git.kernel.org/will/c/5c3686616b18
[2/6] dt-bindings: arm-smmu: Add SM8350 Adreno SMMU
https://git.kernel.org/will/c/16d1646871fb
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev