This series adds the support for QUP peripherals, PRNG, WDT for IPQ5332
SoC.
This series depends on the below patch, due to the node ordering
https://lore.kernel.org/linux-arm-msm/[email protected]/#t
Kathiravan T (2):
dt-bindings: watchdog: qcom-wdt: add qcom,apss-wdt-ipq5332 compatible
arm64: dts: qcom: ipq5332: add few device nodes
.../bindings/watchdog/qcom-wdt.yaml | 1 +
arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts | 14 ++++
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 67 +++++++++++++++++++
3 files changed, 82 insertions(+)
--
2.17.1
Add a compatible for the IPQ5332 platform's APSS watchdog.
Signed-off-by: Kathiravan T <[email protected]>
---
Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
index 6448b633c970..8060a87d29da 100644
--- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
@@ -18,6 +18,7 @@ properties:
- items:
- enum:
- qcom,kpss-wdt-ipq4019
+ - qcom,apss-wdt-ipq5332
- qcom,apss-wdt-msm8994
- qcom,apss-wdt-qcs404
- qcom,apss-wdt-sa8775p
--
2.17.1
Add the nodes for QUP peripheral, PRNG and WDOG. While at it, enable the
I2C device for MI01.2 board.
Signed-off-by: Kathiravan T <[email protected]>
---
arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts | 14 +++++
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 67 +++++++++++++++++++++
2 files changed, 81 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts b/arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts
index 702013b867d7..3af1d5556950 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts
@@ -28,6 +28,13 @@
status = "okay";
};
+&blsp1_i2c1 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c_1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&sdhc {
bus-width = <4>;
max-frequency = <192000000>;
@@ -50,6 +57,13 @@
/* PINCTRL */
&tlmm {
+ i2c_1_pins: i2c-1-state {
+ pins = "gpio29", "gpio30";
+ function = "blsp1_i2c0";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
sdc_default_state: sdc-default-state {
clk-pins {
pins = "gpio13";
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index 04ef80f267bf..fcc2b901bb65 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -134,6 +134,13 @@
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
+ rng: rng@e3000 {
+ compatible = "qcom,prng-ee";
+ reg = <0x000e3000 0x1000>;
+ clocks = <&gcc GCC_PRNG_AHB_CLK>;
+ clock-names = "core";
+ };
+
tlmm: pinctrl@1000000 {
compatible = "qcom,ipq5332-tlmm";
reg = <0x01000000 0x300000>;
@@ -191,6 +198,16 @@
status = "disabled";
};
+ blsp_dma: dma-controller@7884000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x07884000 0x1d000>;
+ interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ };
+
blsp1_uart0: serial@78af000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x078af000 0x200>;
@@ -201,6 +218,48 @@
status = "disabled";
};
+ blsp1_spi0: spi@78b5000 {
+ compatible = "qcom,spi-qup-v2.2.1";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x078b5000 0x600>;
+ interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ dmas = <&blsp_dma 4>, <&blsp_dma 5>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ blsp1_i2c1: i2c@78b6000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x078b6000 0x600>;
+ interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ dmas = <&blsp_dma 6>, <&blsp_dma 7>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ blsp1_spi2: spi@78b7000 {
+ compatible = "qcom,spi-qup-v2.2.1";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x078b7000 0x600>;
+ interrupts = <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ dmas = <&blsp_dma 8>, <&blsp_dma 9>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
intc: interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2";
reg = <0x0b000000 0x1000>, /* GICD */
@@ -233,6 +292,14 @@
};
};
+ watchdog: watchdog@b017000 {
+ compatible = "qcom,apss-wdt-ipq5332", "qcom,kpss-wdt";
+ reg = <0x0b017000 0x1000>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&sleep_clk>;
+ timeout-sec = <30>;
+ };
+
apcs_glb: mailbox@b111000 {
compatible = "qcom,ipq5332-apcs-apps-global",
"qcom,ipq6018-apcs-apps-global";
--
2.17.1
On 20/03/2023 10:44, Kathiravan T wrote:
> Add a compatible for the IPQ5332 platform's APSS watchdog.
>
> Signed-off-by: Kathiravan T <[email protected]>
> ---
> Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml | 1 +
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On 20/03/2023 10:44, Kathiravan T wrote:
> Add the nodes for QUP peripheral, PRNG and WDOG. While at it, enable the
> I2C device for MI01.2 board.
>
> Signed-off-by: Kathiravan T <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts | 14 +++++
> arch/arm64/boot/dts/qcom/ipq5332.dtsi | 67 +++++++++++++++++++++
> 2 files changed, 81 insertions(+)
Thank you for your patch. There is something to discuss/improve.
> +
> blsp1_uart0: serial@78af000 {
> compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> reg = <0x078af000 0x200>;
> @@ -201,6 +218,48 @@
> status = "disabled";
> };
>
> + blsp1_spi0: spi@78b5000 {
> + compatible = "qcom,spi-qup-v2.2.1";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x078b5000 0x600>;
Please keep the reg as second property, after compatible.
Best regards,
Krzysztof
On Mon, Mar 20, 2023 at 03:14:49PM +0530, Kathiravan T wrote:
> Add a compatible for the IPQ5332 platform's APSS watchdog.
>
> Signed-off-by: Kathiravan T <[email protected]>
Reviewed-by: Guenter Roeck <[email protected]>
> ---
> Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
> index 6448b633c970..8060a87d29da 100644
> --- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
> @@ -18,6 +18,7 @@ properties:
> - items:
> - enum:
> - qcom,kpss-wdt-ipq4019
> + - qcom,apss-wdt-ipq5332
> - qcom,apss-wdt-msm8994
> - qcom,apss-wdt-qcs404
> - qcom,apss-wdt-sa8775p
> --
> 2.17.1
>