Changes since v1:
-----------------
- v1 can be viewed here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Folded the BAM DMA dt-binding change.
(sent earlier as: https://lore.kernel.org/linux-arm-msm/[email protected]/)
- Folded the QCE dt-binding change.
(sent earlier as: https://lore.kernel.org/linux-arm-msm/[email protected]/)
- Folded Neil's SM8450 dts patch in this series.
- Addressed review comments from Rob, Stephan and Konrad.
- Collected Konrad's R-B for [PATCH 5/9].
This patchset enables Crypto Engine support for Qualcomm SoCs like
SM6115, SM8150, SM8250, SM8350 and SM8450.
While at it, also fix the compatible string for BAM DMA engine
used in sdm845.dtsi
Note that:
- SM8250 crypto engine patch utilizes the work already done by myself and
Vladimir.
- SM8350 crypto engine patch utilizes the work already done by Robert.
- SM8450 crypto engine patch utilizes the work already done by Neil.
Also this patchset is rebased on linux-next/master.
Bhupesh Sharma (9):
dt-bindings: dma: Add support for SM6115 and QCM2290 SoCs
dt-bindings: dma: Increase iommu maxItems for BAM DMA
dt-bindings: qcom-qce: Fix compatibles combinations for SM8150 and
IPQ4019 SoCs
dt-bindings: qcom-qce: Add compatibles for SM6115 and QCM2290
arm64: dts: qcom: sdm845: Fix the BAM DMA engine compatible string
arm64: dts: qcom: sm6115: Add Crypto Engine support
arm64: dts: qcom: sm8150: Add Crypto Engine support
arm64: dts: qcom: sm8250: Add Crypto Engine support
arm64: dts: qcom: sm8350: Add Crypto Engine support
Neil Armstrong (1):
arm64: dts: qcom: sm8450: add crypto nodes
.../devicetree/bindings/crypto/qcom-qce.yaml | 8 ++++++
.../devicetree/bindings/dma/qcom,bam-dma.yaml | 24 ++++++++++------
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sm6115.dtsi | 22 +++++++++++++++
arch/arm64/boot/dts/qcom/sm8150.dtsi | 22 +++++++++++++++
arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 +++++++++++++++
arch/arm64/boot/dts/qcom/sm8350.dtsi | 22 +++++++++++++++
arch/arm64/boot/dts/qcom/sm8450.dtsi | 28 +++++++++++++++++++
8 files changed, 141 insertions(+), 9 deletions(-)
--
2.38.1
Since SM8450 BAM DMA engine supports five iommu entries,
increase the maxItems in the iommu property section, without
which 'dtbs_check' reports the following error:
arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx224.dtb:
dma-controller@1dc4000: iommus: is too long
Signed-off-by: Bhupesh Sharma <[email protected]>
---
Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml
index 624208d20a34..5469c9c2a1df 100644
--- a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml
+++ b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml
@@ -46,7 +46,7 @@ properties:
iommus:
minItems: 1
- maxItems: 4
+ maxItems: 5
num-channels:
$ref: /schemas/types.yaml#/definitions/uint32
--
2.38.1
Currently the compatible list available in 'qce' dt-bindings does not
support SM8150 and IPQ4019 SoCs directly, leading to following
'dtbs_check' error:
arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano-griffin.dtb:
crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed:
['qcom,sm8150-qce', 'qcom,qce'] is too long
['qcom,sm8150-qce', 'qcom,qce'] is too short
Fix the same.
Signed-off-by: Bhupesh Sharma <[email protected]>
---
Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
index e375bd981300..90ddf98a6df9 100644
--- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
@@ -24,6 +24,12 @@ properties:
deprecated: true
description: Kept only for ABI backward compatibility
+ - items:
+ - enum:
+ - qcom,ipq4019-qce
+ - qcom,sm8150-qce
+ - const: qcom,qce
+
- items:
- enum:
- qcom,ipq6018-qce
--
2.38.1
Crypto Engine block on Qualcomm SoCs SM6115 and QCM2290
do not require clocks strictly, so add compatibles for these
SoCs, indicating that they are similar to the flavour
found on SM8150.
Signed-off-by: Bhupesh Sharma <[email protected]>
---
Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
index 90ddf98a6df9..82ea97568008 100644
--- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
@@ -41,6 +41,8 @@ properties:
- items:
- enum:
+ - qcom,qcm2290-qce
+ - qcom,sm6115-qce
- qcom,sm8250-qce
- qcom,sm8350-qce
- qcom,sm8450-qce
--
2.38.1
Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm6115.dtsi'.
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sm6115.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index c56738633431..d657e1b02062 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -664,6 +664,28 @@ usb_1_hsphy: phy@1613000 {
status = "disabled";
};
+ cryptobam: dma-controller@1b04000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0x0 0x01b04000 0x0 0x24000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ num-channels = <8>;
+ qcom,num-ees = <2>;
+ iommus = <&apps_smmu 0x94 0x11>,
+ <&apps_smmu 0x96 0x11>;
+ };
+
+ crypto: crypto@1b3a000 {
+ compatible = "qcom,sm6115-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0x0 0x01b3a000 0x0 0x6000>;
+ dmas = <&cryptobam 6>, <&cryptobam 7>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x94 0x11>,
+ <&apps_smmu 0x96 0x11>;
+ };
+
qfprom@1b40000 {
compatible = "qcom,sm6115-qfprom", "qcom,qfprom";
reg = <0x0 0x01b40000 0x0 0x7000>;
--
2.38.1
Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm8150.dtsi'.
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 662098e85b97..5213e7e3e44b 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -2082,6 +2082,28 @@ ufs_mem_phy_lanes: phy@1d87400 {
};
};
+ cryptobam: dma-controller@1dc4000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x24000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x514 0x0011>,
+ <&apps_smmu 0x516 0x0011>;
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,sm8150-qce", "qcom,qce";
+ reg = <0 0x01dfa000 0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x514 0x0011>,
+ <&apps_smmu 0x516 0x0011>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
+ interconnect-names = "memory";
+ };
+
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0x0 0x01f40000 0x0 0x20000>;
--
2.38.1
Add crypto engine (CE) and CE BAM related nodes and definitions to
'sm8350.dtsi'.
Co-developed-by and Signed-off-by: Robert Foss <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index b2f1ea4b671e..39ee7ab78387 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1730,6 +1730,28 @@ ufs_mem_phy_lanes: phy@1d87400 {
};
};
+ cryptobam: dma-controller@1dc4000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x24000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x594 0x0011>,
+ <&apps_smmu 0x596 0x0011>;
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,sm8350-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0 0x01dfa000 0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x594 0x0011>,
+ <&apps_smmu 0x596 0x0011>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
+ interconnect-names = "memory";
+ };
+
ipa: ipa@1e40000 {
compatible = "qcom,sm8350-ipa";
--
2.38.1
From: Neil Armstrong <[email protected]>
Add crypto engine (CE) and CE BAM related nodes and definitions
for the SM8450 SoC.
Signed-off-by: Neil Armstrong <[email protected]>
[Bhupesh: Corrected the compatible list]
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 7c1d1464a1f8..c2b6c163ee6b 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -4084,6 +4084,34 @@ ufs_mem_phy_lanes: phy@1d87400 {
};
};
+ cryptobam: dma-controller@1dc4000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x28000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x584 0x11>,
+ <&apps_smmu 0x588 0x0>,
+ <&apps_smmu 0x598 0x5>,
+ <&apps_smmu 0x59a 0x0>,
+ <&apps_smmu 0x59f 0x0>;
+ };
+
+ crypto: crypto@1de0000 {
+ compatible = "qcom,sm8450-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0 0x01dfa000 0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x584 0x11>,
+ <&apps_smmu 0x588 0x0>,
+ <&apps_smmu 0x598 0x5>,
+ <&apps_smmu 0x59a 0x0>,
+ <&apps_smmu 0x59f 0x0>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "memory";
+ };
+
sdhc_2: mmc@8804000 {
compatible = "qcom,sm8450-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x08804000 0 0x1000>;
--
2.38.1
Hi Bhupesh,
On 3/22/23 13:45, Bhupesh Sharma wrote:
> Currently the compatible list available in 'qce' dt-bindings does not
> support SM8150 and IPQ4019 SoCs directly, leading to following
> 'dtbs_check' error:
>
> arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano-griffin.dtb:
> crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed:
> ['qcom,sm8150-qce', 'qcom,qce'] is too long
> ['qcom,sm8150-qce', 'qcom,qce'] is too short
>
> Fix the same.
>
> Signed-off-by: Bhupesh Sharma <[email protected]>
> ---
> Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
> index e375bd981300..90ddf98a6df9 100644
> --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
> +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
> @@ -24,6 +24,12 @@ properties:
> deprecated: true
> description: Kept only for ABI backward compatibility
>
> + - items:
> + - enum:
> + - qcom,ipq4019-qce
> + - qcom,sm8150-qce
> + - const: qcom,qce
> +
thank you for the fix, the change is correct, please apply the tag:
Fixes: 00f3bc2db351 ("dt-bindings: qcom-qce: Add new SoC compatible strings for Qualcomm QCE IP")
But let me ask you to split the "items" into two:
- items:
- const: qcom,ipq4019-qce
- const: qcom,qce
- items:
- const: qcom,sm8150-qce
- const: qcom,qce
and put each of these two new items below a list of compatible values,
where a family compatible describes the list.
Nevertheless, please also add my tag:
Reviewed-by: Vladimir Zapolskiy <[email protected]>
--
Best wishes,
Vladimir
On 27/03/2023 13:49, Vladimir Zapolskiy wrote:
> Hi Bhupesh,
>
> On 3/22/23 13:45, Bhupesh Sharma wrote:
>> Currently the compatible list available in 'qce' dt-bindings does not
>> support SM8150 and IPQ4019 SoCs directly, leading to following
>> 'dtbs_check' error:
>>
>> arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano-griffin.dtb:
>> crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed:
>> ['qcom,sm8150-qce', 'qcom,qce'] is too long
>> ['qcom,sm8150-qce', 'qcom,qce'] is too short
>>
>> Fix the same.
>>
>> Signed-off-by: Bhupesh Sharma <[email protected]>
>> ---
>> Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
>> index e375bd981300..90ddf98a6df9 100644
>> --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
>> +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
>> @@ -24,6 +24,12 @@ properties:
>> deprecated: true
>> description: Kept only for ABI backward compatibility
>>
>> + - items:
>> + - enum:
>> + - qcom,ipq4019-qce
>> + - qcom,sm8150-qce
>> + - const: qcom,qce
>> +
>
> thank you for the fix, the change is correct, please apply the tag:
>
> Fixes: 00f3bc2db351 ("dt-bindings: qcom-qce: Add new SoC compatible strings for Qualcomm QCE IP")
>
> But let me ask you to split the "items" into two:
>
> - items:
> - const: qcom,ipq4019-qce
> - const: qcom,qce
>
> - items:
> - const: qcom,sm8150-qce
> - const: qcom,qce
>
Why splitting these? The enum is the preferred way usually, so why here
do it differently?
Best regards,
Krzysztof
On Mon, 27 Mar 2023 at 17:49, Krzysztof Kozlowski
<[email protected]> wrote:
>
> On 27/03/2023 13:49, Vladimir Zapolskiy wrote:
> > Hi Bhupesh,
> >
> > On 3/22/23 13:45, Bhupesh Sharma wrote:
> >> Currently the compatible list available in 'qce' dt-bindings does not
> >> support SM8150 and IPQ4019 SoCs directly, leading to following
> >> 'dtbs_check' error:
> >>
> >> arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano-griffin.dtb:
> >> crypto@1dfa000: compatible: 'oneOf' conditional failed, one must be fixed:
> >> ['qcom,sm8150-qce', 'qcom,qce'] is too long
> >> ['qcom,sm8150-qce', 'qcom,qce'] is too short
> >>
> >> Fix the same.
> >>
> >> Signed-off-by: Bhupesh Sharma <[email protected]>
> >> ---
> >> Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 6 ++++++
> >> 1 file changed, 6 insertions(+)
> >>
> >> diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
> >> index e375bd981300..90ddf98a6df9 100644
> >> --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
> >> +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
> >> @@ -24,6 +24,12 @@ properties:
> >> deprecated: true
> >> description: Kept only for ABI backward compatibility
> >>
> >> + - items:
> >> + - enum:
> >> + - qcom,ipq4019-qce
> >> + - qcom,sm8150-qce
> >> + - const: qcom,qce
> >> +
> >
> > thank you for the fix, the change is correct, please apply the tag:
> >
> > Fixes: 00f3bc2db351 ("dt-bindings: qcom-qce: Add new SoC compatible strings for Qualcomm QCE IP")
> >
> > But let me ask you to split the "items" into two:
> >
> > - items:
> > - const: qcom,ipq4019-qce
> > - const: qcom,qce
> >
> > - items:
> > - const: qcom,sm8150-qce
> > - const: qcom,qce
> >
>
> Why splitting these? The enum is the preferred way usually, so why here
> do it differently?
Exactly, so our compatibles as per my patch can be :
"qcom,ipq4019-qce", "qcom,qce" or "qcom,sm8150-qce", "qcom,qce" which
is what we want to achieve as these are the base compatible versions
for further socs, with compatible strings as:
"qcom,<new-soc-with-crypto-same-as-ipq4019-qce", "qcom,ipq4019-qce",
"qcom,qce" , or
"qcom,<new-soc-with-crypto-same-as-sm8150-qce", "qcom,sm8150-qce", "qcom,qce"
Thanks,
Bhupesh