2023-03-28 20:21:17

by Borislav Petkov

Subject: [PATCH v2 0/2] SEV-*: Cleanups

From: "Borislav Petkov (AMD)" <[email protected]>

Hi,

here's v2.

tglx says it is better for cc_platform_has() and descendants to be
noinstr vs inlining it as the whole code is a bit bigger for that.

I've queued the export of cc_vendor already so that the parallel CPU
bringup stuff can use it:

https://git.kernel.org/tip/5ae57743f578725a5dadb6f31d7798ee55e6e967

Thx.

Borislav Petkov (AMD) (2):
x86/coco: Mark cc_platform_has() and descendants noinstr
x86/sev: Get rid of special sev_es_enable_key

arch/x86/coco/core.c | 8 ++++----
arch/x86/include/asm/sev.h | 11 +++++++----
arch/x86/kernel/sev.c | 5 -----
3 files changed, 11 insertions(+), 13 deletions(-)

--
2.35.1

2023-03-28 20:24:10

by Borislav Petkov

Subject: [PATCH v2 1/2] x86/coco: Mark cc_platform_has() and descendants noinstr

From: "Borislav Petkov (AMD)" <[email protected]>

Those will be used in code regions where instrumentation is not allowed
so mark them as such.

No functional changes.

Signed-off-by: Borislav Petkov (AMD) <[email protected]>
---
arch/x86/coco/core.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/coco/core.c b/arch/x86/coco/core.c
index 73f83233d25d..df10e75be085 100644
--- a/arch/x86/coco/core.c
+++ b/arch/x86/coco/core.c
@@ -16,7 +16,7 @@
enum cc_vendor cc_vendor __ro_after_init;
static u64 cc_mask __ro_after_init;

-static bool intel_cc_platform_has(enum cc_attr attr)
+static bool noinstr intel_cc_platform_has(enum cc_attr attr)
{
switch (attr) {
case CC_ATTR_GUEST_UNROLL_STRING_IO:
@@ -34,7 +34,7 @@ static bool intel_cc_platform_has(enum cc_attr attr)
* the other levels of SME/SEV functionality, including C-bit
* based SEV-SNP, are not enabled.
*/
-static __maybe_unused bool amd_cc_platform_vtom(enum cc_attr attr)
+static __maybe_unused __always_inline bool amd_cc_platform_vtom(enum cc_attr attr)
{
switch (attr) {
case CC_ATTR_GUEST_MEM_ENCRYPT:
@@ -58,7 +58,7 @@ static __maybe_unused bool amd_cc_platform_vtom(enum cc_attr attr)
* the trampoline area must be encrypted.
*/

-static bool amd_cc_platform_has(enum cc_attr attr)
+static bool noinstr amd_cc_platform_has(enum cc_attr attr)
{
#ifdef CONFIG_AMD_MEM_ENCRYPT

@@ -97,7 +97,7 @@ static bool amd_cc_platform_has(enum cc_attr attr)
#endif
}

-bool cc_platform_has(enum cc_attr attr)
+bool noinstr cc_platform_has(enum cc_attr attr)
{
switch (cc_vendor) {
case CC_VENDOR_AMD:
--
2.35.1

2023-04-04 20:27:34

by Tom Lendacky

Subject: Re: [PATCH v2 0/2] SEV-*: Cleanups

On 3/28/23 15:17, Borislav Petkov wrote:
> From: "Borislav Petkov (AMD)" <[email protected]>
>
> Hi,
>
> here's v2.
>
> tglx says it is better for cc_platform_has() and descendants to be
> noinstr vs inlining it as the whole code is a bit bigger for that.
>
> I've queued the export of cc_vendor already so that the parallel CPU
> bringup stuff can use it:
>
> https://git.kernel.org/tip/5ae57743f578725a5dadb6f31d7798ee55e6e967
>
> Thx.

For the series:

Acked-by: Tom Lendacky <[email protected]>

>
> Borislav Petkov (AMD) (2):
> x86/coco: Mark cc_platform_has() and descendants noinstr
> x86/sev: Get rid of special sev_es_enable_key
>
> arch/x86/coco/core.c | 8 ++++----
> arch/x86/include/asm/sev.h | 11 +++++++----
> arch/x86/kernel/sev.c | 5 -----
> 3 files changed, 11 insertions(+), 13 deletions(-)
>

2023-05-09 11:17:40

by tip-bot2 for Alexey Makhalov

Subject: [tip: x86/sev] x86/coco: Mark cc_platform_has() and descendants noinstr

The following commit has been merged into the x86/sev branch of tip:

Commit-ID: 1eaf282e2c7d062a946980758df013f09f934a54
Gitweb: https://git.kernel.org/tip/1eaf282e2c7d062a946980758df013f09f934a54
Author: Borislav Petkov (AMD) <[email protected]>
AuthorDate: Tue, 28 Mar 2023 22:17:11 +02:00
Committer: Borislav Petkov (AMD) <[email protected]>
CommitterDate: Mon, 08 May 2023 11:39:35 +02:00

x86/coco: Mark cc_platform_has() and descendants noinstr

Those will be used in code regions where instrumentation is not allowed
so mark them as such.

No functional changes.

Signed-off-by: Borislav Petkov (AMD) <[email protected]>
Acked-by: Tom Lendacky <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
arch/x86/coco/core.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/coco/core.c b/arch/x86/coco/core.c
index 73f8323..df10e75 100644
--- a/arch/x86/coco/core.c
+++ b/arch/x86/coco/core.c
@@ -16,7 +16,7 @@
enum cc_vendor cc_vendor __ro_after_init;
static u64 cc_mask __ro_after_init;

-static bool intel_cc_platform_has(enum cc_attr attr)
+static bool noinstr intel_cc_platform_has(enum cc_attr attr)
{
switch (attr) {
case CC_ATTR_GUEST_UNROLL_STRING_IO:
@@ -34,7 +34,7 @@ static bool intel_cc_platform_has(enum cc_attr attr)
* the other levels of SME/SEV functionality, including C-bit
* based SEV-SNP, are not enabled.
*/
-static __maybe_unused bool amd_cc_platform_vtom(enum cc_attr attr)
+static __maybe_unused __always_inline bool amd_cc_platform_vtom(enum cc_attr attr)
{
switch (attr) {
case CC_ATTR_GUEST_MEM_ENCRYPT:
@@ -58,7 +58,7 @@ static __maybe_unused bool amd_cc_platform_vtom(enum cc_attr attr)
* the trampoline area must be encrypted.
*/

-static bool amd_cc_platform_has(enum cc_attr attr)
+static bool noinstr amd_cc_platform_has(enum cc_attr attr)
{
#ifdef CONFIG_AMD_MEM_ENCRYPT

@@ -97,7 +97,7 @@ static bool amd_cc_platform_has(enum cc_attr attr)
#endif
}

-bool cc_platform_has(enum cc_attr attr)
+bool noinstr cc_platform_has(enum cc_attr attr)
{
switch (cc_vendor) {
case CC_VENDOR_AMD: