* About *
The Qualcomm SDM845 SoC has a separate SLPI (Sensor Low Power Island)
DSP for sensors connected to the SoC which is responsible for exposing
sensors to userspace, power saving, and other features.
While sensors are connected to GPIOs of the SoC, they cannot be used
because the hypervisor blocks direct access to the sensors, thus the
DSP must be used to access any sensor on this SoC. The SLPI DSP uses a
GLink edge (dsps) to communicate with the host and has a FastRPC interface
to load files from the host filesystem such as sensor configuration files.
The FastRPC interface does not use regular FastRPC Compute Banks
but instead uses an allocated CMA region through which communication happens.
* Changes *
This patchseries completes support for the SLPI in the Qualcomm SDM845 SoC
by adding the SLPI to the SDM845 DTS and enable it for 2 hardware devices:
- Oneplus 6
- SHIFTPHONES SHIFT6mq
* Related patches *
1. Remoteproc changes (v2) to support the SLPI DSP in SDM845:
https://lore.kernel.org/linux-remoteproc/[email protected]/
2. FastRPC changes (v2) to support the SLPI DSP in SDM845:
https://lore.kernel.org/linux-arm-msm/[email protected]/
This serie does not depend on any serie, but all of them are necessary
to enable the feature in the end.
* Changelog *
Changes in v2:
- Removed double blank lines
- Enforce alphabetically order for 'slpi_pas'
- Reordered 'slpi_pas' properties
- Fixed FastRPC syntax
- Dropped qcom,assign-all-mem property as this is not necessary anymore
Changes in v3:
- Dropped FastRPC dt-bindings change, unnecessary to relax the bindings
- Add reg property to compute-cb for the SLPI on SDM845
Kind regards,
Dylan Van Assche
Dylan Van Assche (4):
dts: arm64: qcom: sdm845: add SLPI remoteproc
dts: arm64: qcom: sdm845: add SLPI FastRPC support
dts: arm64: qcom: sdm845-oneplus: enable SLPI
dts: arm64: qcom: sdm845-shift-axolotl: enable SLPI
.../boot/dts/qcom/sdm845-oneplus-common.dtsi | 5 ++
.../boot/dts/qcom/sdm845-shift-axolotl.dts | 5 ++
arch/arm64/boot/dts/qcom/sdm845.dtsi | 60 +++++++++++++++++++
3 files changed, 70 insertions(+)
--
2.39.2
Qualcomm SDM845 SoC features a SLPI DSP which uses FastRPC through
an allocated memory region to load files from the host filesystem
such as sensor configuration files.
Add a FastRPC node at /dev/fastrpc-sdsp and a DMA region, similar to
downstream, to allow userspace to communicate with the SLPI via the
FastRPC interface for initializing the sensors on the SLPI.
Signed-off-by: Dylan Van Assche <[email protected]>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 3b547cb7aeb8..8ea4944f3ad6 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -878,6 +878,14 @@ mdata_mem: mpss-metadata {
size = <0 0x4000>;
no-map;
};
+
+ fastrpc_mem: fastrpc {
+ compatible = "shared-dma-pool";
+ reusable;
+ alloc-ranges = <0 0x00000000 0 0xffffffff>;
+ alignment = <0 0x400000>;
+ size = <0 0x1000000>;
+ };
};
adsp_pas: remoteproc-adsp {
@@ -3344,6 +3352,22 @@ glink-edge {
label = "dsps";
qcom,remote-pid = <3>;
mboxes = <&apss_shared 24>;
+
+ fastrpc {
+ compatible = "qcom,fastrpc";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+ label = "sdsp";
+ qcom,non-secure-domain;
+ qcom,vmids = <0x3 0xF 0x5 0x6>;
+ memory-region = <&fastrpc_mem>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb@0 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <0>;
+ };
+ };
};
};
--
2.39.2
Add the SLPI remoteproc to the SDM845 Qualcomm SoC which is responsible
for exposing the sensors connected to the SoC. The SLPI communicates
over GLink edge 'dsps' and is similar to other DSPs e.g. ADSP or CDSP.
This patch allows the SLPI to boot and expose itself over QRTR as
service 400.
Signed-off-by: Dylan Van Assche <[email protected]>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 36 ++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 2f32179c7d1b..3b547cb7aeb8 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -3311,6 +3311,42 @@ glink-edge {
};
};
+ slpi_pas: remoteproc@5c00000 {
+ compatible = "qcom,sdm845-slpi-pas";
+ reg = <0 0x5c00000 0 0x4000>;
+
+ interrupts-extended = <&intc GIC_SPI 494 IRQ_TYPE_EDGE_RISING>,
+ <&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ qcom,qmp = <&aoss_qmp>;
+
+ power-domains = <&rpmhpd SDM845_CX>,
+ <&rpmhpd SDM845_MX>;
+ power-domain-names = "lcx", "lmx";
+
+ memory-region = <&slpi_mem>;
+
+ qcom,smem-states = <&slpi_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>;
+ label = "dsps";
+ qcom,remote-pid = <3>;
+ mboxes = <&apss_shared 24>;
+ };
+ };
+
gpucc: clock-controller@5090000 {
compatible = "qcom,sdm845-gpucc";
reg = <0 0x05090000 0 0x9000>;
--
2.39.2
Enable the SLPI DSP on the SHIFTPHONES SHIFT6mq phone with a
Qualcomm SDM845 SoC.
Signed-off-by: Dylan Van Assche <[email protected]>
---
arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts b/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts
index b54e304abf71..bd9571a258cf 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts
@@ -572,6 +572,11 @@ &qupv3_id_1 {
status = "okay";
};
+&slpi_pas {
+ firmware-name = "qcom/sdm845/axolotl/slpi.mbn";
+ status = "okay";
+};
+
&tlmm {
gpio-reserved-ranges = <0 4>, <81 4>;
--
2.39.2
Enable the SLPI DSP on the Oneplus 6 phone with a Qualcomm SDM845 SoC.
Signed-off-by: Dylan Van Assche <[email protected]>
---
arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi
index b01542d79ae2..3bd15984990c 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi
@@ -552,6 +552,11 @@ &qup_uart9_tx {
bias-disable;
};
+&slpi_pas {
+ firmware-name = "qcom/sdm845/oneplus6/slpi.mbn";
+ status = "okay";
+};
+
&sound {
compatible = "qcom,sdm845-sndcard";
pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active &quat_mi2s_sd1_active>;
--
2.39.2
On 30.03.2023 18:53, Dylan Van Assche wrote:
> Enable the SLPI DSP on the Oneplus 6 phone with a Qualcomm SDM845 SoC.
>
> Signed-off-by: Dylan Van Assche <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
> arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi
> index b01542d79ae2..3bd15984990c 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi
> @@ -552,6 +552,11 @@ &qup_uart9_tx {
> bias-disable;
> };
>
> +&slpi_pas {
> + firmware-name = "qcom/sdm845/oneplus6/slpi.mbn";
> + status = "okay";
> +};
> +
> &sound {
> compatible = "qcom,sdm845-sndcard";
> pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active &quat_mi2s_sd1_active>;
On 30.03.2023 18:53, Dylan Van Assche wrote:
> Enable the SLPI DSP on the SHIFTPHONES SHIFT6mq phone with a
> Qualcomm SDM845 SoC.
>
> Signed-off-by: Dylan Van Assche <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
> arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts b/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts
> index b54e304abf71..bd9571a258cf 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts
> @@ -572,6 +572,11 @@ &qupv3_id_1 {
> status = "okay";
> };
>
> +&slpi_pas {
> + firmware-name = "qcom/sdm845/axolotl/slpi.mbn";
> + status = "okay";
> +};
> +
> &tlmm {
> gpio-reserved-ranges = <0 4>, <81 4>;
>
On 30.03.2023 18:53, Dylan Van Assche wrote:
> Qualcomm SDM845 SoC features a SLPI DSP which uses FastRPC through
> an allocated memory region to load files from the host filesystem
> such as sensor configuration files.
>
> Add a FastRPC node at /dev/fastrpc-sdsp and a DMA region, similar to
> downstream, to allow userspace to communicate with the SLPI via the
> FastRPC interface for initializing the sensors on the SLPI.
>
> Signed-off-by: Dylan Van Assche <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 3b547cb7aeb8..8ea4944f3ad6 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -878,6 +878,14 @@ mdata_mem: mpss-metadata {
> size = <0 0x4000>;
> no-map;
> };
> +
> + fastrpc_mem: fastrpc {
> + compatible = "shared-dma-pool";
> + reusable;
Please move it last to get a nice reverse-Christmas-tree layout.
> + alloc-ranges = <0 0x00000000 0 0xffffffff>;
Would there be any issues with it starting over (1<<31 - 1)?
> + alignment = <0 0x400000>;
Please use 0x0 for the 0 here, as it's essentially reg.size with
size-cells = 2
> + size = <0 0x1000000>;
Ditto
> + };
> };
>
> adsp_pas: remoteproc-adsp {
> @@ -3344,6 +3352,22 @@ glink-edge {
> label = "dsps";
> qcom,remote-pid = <3>;
> mboxes = <&apss_shared 24>;
> +
> + fastrpc {
> + compatible = "qcom,fastrpc";
> + qcom,glink-channels = "fastrpcglink-apps-dsp";
> + label = "sdsp";
> + qcom,non-secure-domain;
> + qcom,vmids = <0x3 0xF 0x5 0x6>;
Please use the recently-introduced header and depend on (and
make a patch atop)
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t
Konrad
> + memory-region = <&fastrpc_mem>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + compute-cb@0 {
> + compatible = "qcom,fastrpc-compute-cb";
> + reg = <0>;
> + };
> + };
> };
> };
>
On 30/03/2023 18:53, Dylan Van Assche wrote:
> Enable the SLPI DSP on the Oneplus 6 phone with a Qualcomm SDM845 SoC.
>
> Signed-off-by: Dylan Van Assche <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi | 5 ++++
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On 30/03/2023 18:53, Dylan Van Assche wrote:
> Enable the SLPI DSP on the SHIFTPHONES SHIFT6mq phone with a
> Qualcomm SDM845 SoC.
>
> Signed-off-by: Dylan Van Assche <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts | 5 +++++
> 1 file changed, 5 insertions(+)
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On 30/03/2023 18:53, Dylan Van Assche wrote:
> Add the SLPI remoteproc to the SDM845 Qualcomm SoC which is responsible
> for exposing the sensors connected to the SoC. The SLPI communicates
> over GLink edge 'dsps' and is similar to other DSPs e.g. ADSP or CDSP.
> This patch allows the SLPI to boot and expose itself over QRTR as
> service 400.
>
> Signed-off-by: Dylan Van Assche <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 36 ++++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 2f32179c7d1b..3b547cb7aeb8 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -3311,6 +3311,42 @@ glink-edge {
> };
> };
>
> + slpi_pas: remoteproc@5c00000 {
This does not look like correct place. Are you sure you followed the
order by unit address?
Best regards,
Krzysztof
Hi Krzysztof,
On Fri, 2023-03-31 at 11:05 +0200, Krzysztof Kozlowski wrote:
> On 30/03/2023 18:53, Dylan Van Assche wrote:
> > Add the SLPI remoteproc to the SDM845 Qualcomm SoC which is
> > responsible
> > for exposing the sensors connected to the SoC. The SLPI
> > communicates
> > over GLink edge 'dsps' and is similar to other DSPs e.g. ADSP or
> > CDSP.
> > This patch allows the SLPI to boot and expose itself over QRTR as
> > service 400.
> >
> > Signed-off-by: Dylan Van Assche <[email protected]>
> > ---
> > arch/arm64/boot/dts/qcom/sdm845.dtsi | 36
> > ++++++++++++++++++++++++++++
> > 1 file changed, 36 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > index 2f32179c7d1b..3b547cb7aeb8 100644
> > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > @@ -3311,6 +3311,42 @@ glink-edge {
> > };
> > };
> >
> > + slpi_pas: remoteproc@5c00000 {
>
> This does not look like correct place. Are you sure you followed the
> order by unit address?
>
>
I think I misunderstood...
I sorted them alphabetically by name, but it has to be unit address.
Will fix in v4.
>
> Best regards,
> Krzysztof
>
Kind regards,
Dylan
Hi Konrad,
On Fri, 2023-03-31 at 04:03 +0200, Konrad Dybcio wrote:
>
>
> On 30.03.2023 18:53, Dylan Van Assche wrote:
> > Qualcomm SDM845 SoC features a SLPI DSP which uses FastRPC through
> > an allocated memory region to load files from the host filesystem
> > such as sensor configuration files.
> >
> > Add a FastRPC node at /dev/fastrpc-sdsp and a DMA region, similar
> > to
> > downstream, to allow userspace to communicate with the SLPI via the
> > FastRPC interface for initializing the sensors on the SLPI.
> >
> > Signed-off-by: Dylan Van Assche <[email protected]>
> > ---
> > arch/arm64/boot/dts/qcom/sdm845.dtsi | 24 ++++++++++++++++++++++++
> > 1 file changed, 24 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > index 3b547cb7aeb8..8ea4944f3ad6 100644
> > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > @@ -878,6 +878,14 @@ mdata_mem: mpss-metadata {
> > size = <0 0x4000>;
> > no-map;
> > };
> > +
> > + fastrpc_mem: fastrpc {
> > + compatible = "shared-dma-pool";
> > + reusable;
> Please move it last to get a nice reverse-Christmas-tree layout.
>
Will fix in v4.
> > + alloc-ranges = <0 0x00000000 0 0xffffffff>;
> Would there be any issues with it starting over (1<<31 - 1)?
>
You mean a bigger region then, like the whole CMA region then? AFAIK,
the SLPI always use the same region expecting it to be in this range.
However, I cannot confirm more, as I have no insights in the firmware
running on there, this all comes from finding out what it exactly does
on downstream.
> > + alignment = <0 0x400000>;
> Please use 0x0 for the 0 here, as it's essentially reg.size with
> size-cells = 2
Will fix in v4.
>
> > + size = <0 0x1000000>;
> Ditto
Will fix in v4.
>
> > + };
> > };
> >
> > adsp_pas: remoteproc-adsp {
> > @@ -3344,6 +3352,22 @@ glink-edge {
> > label = "dsps";
> > qcom,remote-pid = <3>;
> > mboxes = <&apss_shared 24>;
> > +
> > + fastrpc {
> > + compatible =
> > "qcom,fastrpc";
> > + qcom,glink-channels =
> > "fastrpcglink-apps-dsp";
> > + label = "sdsp";
> > + qcom,non-secure-domain;
> > + qcom,vmids = <0x3 0xF 0x5
> > 0x6>;
> Please use the recently-introduced header and depend on (and
> make a patch atop)
>
> https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t
>
> Konrad
>
> > + memory-region =
> > <&fastrpc_mem>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + compute-cb@0 {
> > + compatible =
> > "qcom,fastrpc-compute-cb";
> > + reg = <0>;
> > + };
> > + };
> > };
> > };
> >
Kind regards,
Dylan
On 31.03.2023 11:36, Dylan Van Assche wrote:
> Hi Konrad,
>
> On Fri, 2023-03-31 at 04:03 +0200, Konrad Dybcio wrote:
>>
>>
>> On 30.03.2023 18:53, Dylan Van Assche wrote:
>>> Qualcomm SDM845 SoC features a SLPI DSP which uses FastRPC through
>>> an allocated memory region to load files from the host filesystem
>>> such as sensor configuration files.
>>>
>>> Add a FastRPC node at /dev/fastrpc-sdsp and a DMA region, similar
>>> to
>>> downstream, to allow userspace to communicate with the SLPI via the
>>> FastRPC interface for initializing the sensors on the SLPI.
>>>
>>> Signed-off-by: Dylan Van Assche <[email protected]>
>>> ---
>>> arch/arm64/boot/dts/qcom/sdm845.dtsi | 24 ++++++++++++++++++++++++
>>> 1 file changed, 24 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>> index 3b547cb7aeb8..8ea4944f3ad6 100644
>>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>> @@ -878,6 +878,14 @@ mdata_mem: mpss-metadata {
>>> size = <0 0x4000>;
>>> no-map;
>>> };
>>> +
>>> + fastrpc_mem: fastrpc {
>>> + compatible = "shared-dma-pool";
>>> + reusable;
>> Please move it last to get a nice reverse-Christmas-tree layout.
>>
>
> Will fix in v4.
>
>>> + alloc-ranges = <0 0x00000000 0 0xffffffff>;
>> Would there be any issues with it starting over (1<<31 - 1)?
>>
>
> You mean a bigger region then, like the whole CMA region then? AFAIK,
> the SLPI always use the same region expecting it to be in this range.
> However, I cannot confirm more, as I have no insights in the firmware
> running on there, this all comes from finding out what it exactly does
> on downstream.
I was asking about the <.. 0 0xfff.f> part specifically, as that means
it can't be allocated above 4 gigs. But I guess it's just how qcom
envisioned it.
Also, please use 0x0 in alloc-ranges as well, this is all addresses/
reg sizes.
Konrad
>
>>> + alignment = <0 0x400000>;
>> Please use 0x0 for the 0 here, as it's essentially reg.size with
>> size-cells = 2
>
> Will fix in v4.
>
>>
>>> + size = <0 0x1000000>;
>> Ditto
>
> Will fix in v4.
>
>>
>>> + };
>>> };
>>>
>>> adsp_pas: remoteproc-adsp {
>>> @@ -3344,6 +3352,22 @@ glink-edge {
>>> label = "dsps";
>>> qcom,remote-pid = <3>;
>>> mboxes = <&apss_shared 24>;
>>> +
>>> + fastrpc {
>>> + compatible =
>>> "qcom,fastrpc";
>>> + qcom,glink-channels =
>>> "fastrpcglink-apps-dsp";
>>> + label = "sdsp";
>>> + qcom,non-secure-domain;
>>> + qcom,vmids = <0x3 0xF 0x5
>>> 0x6>;
>> Please use the recently-introduced header and depend on (and
>> make a patch atop)
>>
>> https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t
>>
>> Konrad
>>
>>> + memory-region =
>>> <&fastrpc_mem>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + compute-cb@0 {
>>> + compatible =
>>> "qcom,fastrpc-compute-cb";
>>> + reg = <0>;
>>> + };
>>> + };
>>> };
>>> };
>>>
>
> Kind regards,
> Dylan
On Fri, 2023-03-31 at 14:20 +0200, Konrad Dybcio wrote:
>
>
> On 31.03.2023 11:36, Dylan Van Assche wrote:
> > Hi Konrad,
> >
> > On Fri, 2023-03-31 at 04:03 +0200, Konrad Dybcio wrote:
> > >
> > >
> > > On 30.03.2023 18:53, Dylan Van Assche wrote:
> > > > Qualcomm SDM845 SoC features a SLPI DSP which uses FastRPC
> > > > through
> > > > an allocated memory region to load files from the host
> > > > filesystem
> > > > such as sensor configuration files.
> > > >
> > > > Add a FastRPC node at /dev/fastrpc-sdsp and a DMA region,
> > > > similar
> > > > to
> > > > downstream, to allow userspace to communicate with the SLPI via
> > > > the
> > > > FastRPC interface for initializing the sensors on the SLPI.
> > > >
> > > > Signed-off-by: Dylan Van Assche <[email protected]>
> > > > ---
> > > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 24
> > > > ++++++++++++++++++++++++
> > > > 1 file changed, 24 insertions(+)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > > b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > > index 3b547cb7aeb8..8ea4944f3ad6 100644
> > > > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > > @@ -878,6 +878,14 @@ mdata_mem: mpss-metadata {
> > > > size = <0 0x4000>;
> > > > no-map;
> > > > };
> > > > +
> > > > + fastrpc_mem: fastrpc {
> > > > + compatible = "shared-dma-pool";
> > > > + reusable;
> > > Please move it last to get a nice reverse-Christmas-tree layout.
> > >
> >
> > Will fix in v4.
> >
> > > > + alloc-ranges = <0 0x00000000 0
> > > > 0xffffffff>;
> > > Would there be any issues with it starting over (1<<31 - 1)?
> > >
> >
> > You mean a bigger region then, like the whole CMA region then?
> > AFAIK,
> > the SLPI always use the same region expecting it to be in this
> > range.
> > However, I cannot confirm more, as I have no insights in the
> > firmware
> > running on there, this all comes from finding out what it exactly
> > does
> > on downstream.
> I was asking about the <.. 0 0xfff.f> part specifically, as that
> means
> it can't be allocated above 4 gigs. But I guess it's just how qcom
> envisioned it.
>
I think it is limited by qcom, but I cannot be entirely sure :)
In any case, for v4, do I keep 0xffffffff?
> Also, please use 0x0 in alloc-ranges as well, this is all addresses/
> reg sizes.
>
> Konrad
Yes, will use 0x0 instead of 0.
Dylan
> >
> > > > + alignment = <0 0x400000>;
> > > Please use 0x0 for the 0 here, as it's essentially reg.size with
> > > size-cells = 2
> >
> > Will fix in v4.
> >
> > >
> > > > + size = <0 0x1000000>;
> > > Ditto
> >
> > Will fix in v4.
> >
> > >
> > > > + };
> > > > };
> > > >
> > > > adsp_pas: remoteproc-adsp {
> > > > @@ -3344,6 +3352,22 @@ glink-edge {
> > > > label = "dsps";
> > > > qcom,remote-pid = <3>;
> > > > mboxes = <&apss_shared 24>;
> > > > +
> > > > + fastrpc {
> > > > + compatible =
> > > > "qcom,fastrpc";
> > > > + qcom,glink-channels =
> > > > "fastrpcglink-apps-dsp";
> > > > + label = "sdsp";
> > > > + qcom,non-secure-domain;
> > > > + qcom,vmids = <0x3 0xF
> > > > 0x5
> > > > 0x6>;
> > > Please use the recently-introduced header and depend on (and
> > > make a patch atop)
> > >
> > > https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t
> > >
> > > Konrad
> > >
> > > > + memory-region =
> > > > <&fastrpc_mem>;
> > > > + #address-cells = <1>;
> > > > + #size-cells = <0>;
> > > > +
> > > > + compute-cb@0 {
> > > > + compatible =
> > > > "qcom,fastrpc-compute-cb";
> > > > + reg = <0>;
> > > > + };
> > > > + };
> > > > };
> > > > };
> > > >
> >
> > Kind regards,
> > Dylan
On 31.03.2023 15:14, Dylan Van Assche wrote:
> On Fri, 2023-03-31 at 14:20 +0200, Konrad Dybcio wrote:
>>
>>
>> On 31.03.2023 11:36, Dylan Van Assche wrote:
>>> Hi Konrad,
>>>
>>> On Fri, 2023-03-31 at 04:03 +0200, Konrad Dybcio wrote:
>>>>
>>>>
>>>> On 30.03.2023 18:53, Dylan Van Assche wrote:
>>>>> Qualcomm SDM845 SoC features a SLPI DSP which uses FastRPC
>>>>> through
>>>>> an allocated memory region to load files from the host
>>>>> filesystem
>>>>> such as sensor configuration files.
>>>>>
>>>>> Add a FastRPC node at /dev/fastrpc-sdsp and a DMA region,
>>>>> similar
>>>>> to
>>>>> downstream, to allow userspace to communicate with the SLPI via
>>>>> the
>>>>> FastRPC interface for initializing the sensors on the SLPI.
>>>>>
>>>>> Signed-off-by: Dylan Van Assche <[email protected]>
>>>>> ---
>>>>> arch/arm64/boot/dts/qcom/sdm845.dtsi | 24
>>>>> ++++++++++++++++++++++++
>>>>> 1 file changed, 24 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>>>> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>>>> index 3b547cb7aeb8..8ea4944f3ad6 100644
>>>>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>>>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>>>> @@ -878,6 +878,14 @@ mdata_mem: mpss-metadata {
>>>>> size = <0 0x4000>;
>>>>> no-map;
>>>>> };
>>>>> +
>>>>> + fastrpc_mem: fastrpc {
>>>>> + compatible = "shared-dma-pool";
>>>>> + reusable;
>>>> Please move it last to get a nice reverse-Christmas-tree layout.
>>>>
>>>
>>> Will fix in v4.
>>>
>>>>> + alloc-ranges = <0 0x00000000 0
>>>>> 0xffffffff>;
>>>> Would there be any issues with it starting over (1<<31 - 1)?
>>>>
>>>
>>> You mean a bigger region then, like the whole CMA region then?
>>> AFAIK,
>>> the SLPI always use the same region expecting it to be in this
>>> range.
>>> However, I cannot confirm more, as I have no insights in the
>>> firmware
>>> running on there, this all comes from finding out what it exactly
>>> does
>>> on downstream.
>> I was asking about the <.. 0 0xfff.f> part specifically, as that
>> means
>> it can't be allocated above 4 gigs. But I guess it's just how qcom
>> envisioned it.
>>
>
> I think it is limited by qcom, but I cannot be entirely sure :)
> In any case, for v4, do I keep 0xffffffff?
Yep, let's not stray into the unknown..
Konrad
>
>> Also, please use 0x0 in alloc-ranges as well, this is all addresses/
>> reg sizes.
>>
>> Konrad
>
> Yes, will use 0x0 instead of 0.
>
> Dylan
>
>>>
>>>>> + alignment = <0 0x400000>;
>>>> Please use 0x0 for the 0 here, as it's essentially reg.size with
>>>> size-cells = 2
>>>
>>> Will fix in v4.
>>>
>>>>
>>>>> + size = <0 0x1000000>;
>>>> Ditto
>>>
>>> Will fix in v4.
>>>
>>>>
>>>>> + };
>>>>> };
>>>>>
>>>>> adsp_pas: remoteproc-adsp {
>>>>> @@ -3344,6 +3352,22 @@ glink-edge {
>>>>> label = "dsps";
>>>>> qcom,remote-pid = <3>;
>>>>> mboxes = <&apss_shared 24>;
>>>>> +
>>>>> + fastrpc {
>>>>> + compatible =
>>>>> "qcom,fastrpc";
>>>>> + qcom,glink-channels =
>>>>> "fastrpcglink-apps-dsp";
>>>>> + label = "sdsp";
>>>>> + qcom,non-secure-domain;
>>>>> + qcom,vmids = <0x3 0xF
>>>>> 0x5
>>>>> 0x6>;
>>>> Please use the recently-introduced header and depend on (and
>>>> make a patch atop)
>>>>
>>>> https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t
>>>>
>>>> Konrad
>>>>
>>>>> + memory-region =
>>>>> <&fastrpc_mem>;
>>>>> + #address-cells = <1>;
>>>>> + #size-cells = <0>;
>>>>> +
>>>>> + compute-cb@0 {
>>>>> + compatible =
>>>>> "qcom,fastrpc-compute-cb";
>>>>> + reg = <0>;
>>>>> + };
>>>>> + };
>>>>> };
>>>>> };
>>>>>
>>>
>>> Kind regards,
>>> Dylan
>