2023-04-04 17:18:06

by Tharun Kumar P

[permalink] [raw]
Subject: [PATCH SPI for-next 0/3] spi: mchp-pci1xxxx: Fix minor bugs in spi-pci1xxxx driver

This patch series fixes the following bugs in spi-pci1xxxx driver:
1. Length of SPI transactions is improper
2. SPI transactions fail after suspend and resume
3. Incorrect implementation of pci1xxxx_spi_set_cs API

Tharun Kumar P (3):
spi: mchp-pci1xxxx: Fix length of SPI transactions not set properly in
driver
spi: mchp-pci1xxxx: Fix SPI transactions not working after suspend and
resume
spi: mchp-pci1xxxx: Fix improper implementation of disabling chip
select lines

drivers/spi/spi-pci1xxxx.c | 20 +++++++-------------
1 file changed, 7 insertions(+), 13 deletions(-)

--
2.25.1


2023-04-04 17:18:11

by Tharun Kumar P

[permalink] [raw]
Subject: [PATCH SPI for-next 3/3] spi: mchp-pci1xxxx: Fix improper implementation of disabling chip select lines

Hardware does not have support to disable individual chip select lines.
Disable all chip select lines by using SPI_FORCE_CE bit.

Fixes: 1cc0cbea7167 ("spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX PCIe switch")
Signed-off-by: Tharun Kumar P <[email protected]>
---
drivers/spi/spi-pci1xxxx.c | 17 +++++------------
1 file changed, 5 insertions(+), 12 deletions(-)

diff --git a/drivers/spi/spi-pci1xxxx.c b/drivers/spi/spi-pci1xxxx.c
index 82d4bfeea1fa..4445d82409d6 100644
--- a/drivers/spi/spi-pci1xxxx.c
+++ b/drivers/spi/spi-pci1xxxx.c
@@ -114,17 +114,14 @@ static void pci1xxxx_spi_set_cs(struct spi_device *spi, bool enable)

/* Set the DEV_SEL bits of the SPI_MST_CTL_REG */
regval = readl(par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst));
- if (enable) {
+ if (!enable) {
+ regval |= SPI_FORCE_CE;
regval &= ~SPI_MST_CTL_DEVSEL_MASK;
regval |= (spi_get_chipselect(spi, 0) << 25);
- writel(regval,
- par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst));
} else {
- regval &= ~(spi_get_chipselect(spi, 0) << 25);
- writel(regval,
- par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst));
-
+ regval &= ~SPI_FORCE_CE;
}
+ writel(regval, par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst));
}

static u8 pci1xxxx_get_clock_div(u32 hz)
@@ -199,7 +196,7 @@ static int pci1xxxx_spi_transfer_one(struct spi_controller *spi_ctlr,
else
regval &= ~SPI_MST_CTL_MODE_SEL;

- regval |= ((clkdiv << 5) | SPI_FORCE_CE);
+ regval |= (clkdiv << 5);
regval &= ~SPI_MST_CTL_CMD_LEN_MASK;
regval |= (len << 8);
writel(regval, par->reg_base +
@@ -223,10 +220,6 @@ static int pci1xxxx_spi_transfer_one(struct spi_controller *spi_ctlr,
}
}
}
-
- regval = readl(par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst));
- regval &= ~SPI_FORCE_CE;
- writel(regval, par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst));
p->spi_xfer_in_progress = false;

return 0;
--
2.25.1

2023-04-04 17:18:39

by Tharun Kumar P

[permalink] [raw]
Subject: [PATCH SPI for-next 1/3] spi: mchp-pci1xxxx: Fix length of SPI transactions not set properly in driver

In pci1xxxx_spi_transfer_one API, length of SPI transaction gets cleared
by setting of length mask. Set length of transaction only after masking
length field.

Fixes: 1cc0cbea7167 ("spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX PCIe switch")
Signed-off-by: Tharun Kumar P <[email protected]>
---
drivers/spi/spi-pci1xxxx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-pci1xxxx.c b/drivers/spi/spi-pci1xxxx.c
index 1c5731641a04..419a1d3a5c2e 100644
--- a/drivers/spi/spi-pci1xxxx.c
+++ b/drivers/spi/spi-pci1xxxx.c
@@ -199,8 +199,9 @@ static int pci1xxxx_spi_transfer_one(struct spi_controller *spi_ctlr,
else
regval &= ~SPI_MST_CTL_MODE_SEL;

- regval |= ((clkdiv << 5) | SPI_FORCE_CE | (len << 8));
+ regval |= ((clkdiv << 5) | SPI_FORCE_CE);
regval &= ~SPI_MST_CTL_CMD_LEN_MASK;
+ regval |= (len << 8);
writel(regval, par->reg_base +
SPI_MST_CTL_REG_OFFSET(p->hw_inst));
regval = readl(par->reg_base +
--
2.25.1

2023-04-05 13:53:32

by Mark Brown

[permalink] [raw]
Subject: Re: [PATCH SPI for-next 0/3] spi: mchp-pci1xxxx: Fix minor bugs in spi-pci1xxxx driver

On Tue, 04 Apr 2023 22:46:10 +0530, Tharun Kumar P wrote:
> This patch series fixes the following bugs in spi-pci1xxxx driver:
> 1. Length of SPI transactions is improper
> 2. SPI transactions fail after suspend and resume
> 3. Incorrect implementation of pci1xxxx_spi_set_cs API
>
> Tharun Kumar P (3):
> spi: mchp-pci1xxxx: Fix length of SPI transactions not set properly in
> driver
> spi: mchp-pci1xxxx: Fix SPI transactions not working after suspend and
> resume
> spi: mchp-pci1xxxx: Fix improper implementation of disabling chip
> select lines
>
> [...]

Applied to

https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/3] spi: mchp-pci1xxxx: Fix length of SPI transactions not set properly in driver
commit: 35c8c5e503a82e0a4bf251d32096211eba8c2be6
[2/3] spi: mchp-pci1xxxx: Fix SPI transactions not working after suspend and resume
commit: 4266d21669de62cf3fb6774f7d404c1eb95a5ab3
[3/3] spi: mchp-pci1xxxx: Fix improper implementation of disabling chip select lines
commit: 45d2af82e0e6f662d0d0db20993b35cb1d8da646

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark