2023-05-22 20:33:24

by Jessica Zhang

Subject: [PATCH v4 2/5] drm/msm/dsi: Adjust pclk rate for compression

Adjust the pclk rate to divide hdisplay by the compression ratio when DSC
is enabled.

Signed-off-by: Jessica Zhang <[email protected]>
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 23 +++++++++++++++++++----
1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 18d38b90eb28..d04f8bbd707d 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -561,7 +561,18 @@ void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host)
clk_disable_unprepare(msm_host->byte_clk);
}

-static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode, bool is_bonded_dsi)
+static unsigned long dsi_adjust_compressed_pclk(const struct drm_display_mode *mode,
+ const struct drm_dsc_config *dsc)
+{
+ int new_hdisplay = DIV_ROUND_UP(mode->hdisplay * drm_dsc_get_bpp_int(dsc),
+ dsc->bits_per_component * 3);
+
+ return (new_hdisplay + (mode->htotal - mode->hdisplay))
+ * mode->vtotal * drm_mode_vrefresh(mode);
+}
+
+static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode,
+ const struct drm_dsc_config *dsc, bool is_bonded_dsi)
{
unsigned long pclk_rate;

@@ -576,6 +587,10 @@ static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode, bool
if (is_bonded_dsi)
pclk_rate /= 2;

+ /* If DSC is enabled, divide hdisplay by compression ratio */
+ if (dsc)
+ pclk_rate = dsi_adjust_compressed_pclk(mode, dsc);
+
return pclk_rate;
}

@@ -585,7 +600,7 @@ unsigned long dsi_byte_clk_get_rate(struct mipi_dsi_host *host, bool is_bonded_d
struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
u8 lanes = msm_host->lanes;
u32 bpp = dsi_get_bpp(msm_host->format);
- unsigned long pclk_rate = dsi_get_pclk_rate(mode, is_bonded_dsi);
+ unsigned long pclk_rate = dsi_get_pclk_rate(mode, msm_host->dsc, is_bonded_dsi);
u64 pclk_bpp = (u64)pclk_rate * bpp;

if (lanes == 0) {
@@ -604,7 +619,7 @@ unsigned long dsi_byte_clk_get_rate(struct mipi_dsi_host *host, bool is_bonded_d

static void dsi_calc_pclk(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
{
- msm_host->pixel_clk_rate = dsi_get_pclk_rate(msm_host->mode, is_bonded_dsi);
+ msm_host->pixel_clk_rate = dsi_get_pclk_rate(msm_host->mode, msm_host->dsc, is_bonded_dsi);
msm_host->byte_clk_rate = dsi_byte_clk_get_rate(&msm_host->base, is_bonded_dsi,
msm_host->mode);

@@ -634,7 +649,7 @@ int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_bonded_dsi)

dsi_calc_pclk(msm_host, is_bonded_dsi);

- pclk_bpp = (u64)dsi_get_pclk_rate(msm_host->mode, is_bonded_dsi) * bpp;
+ pclk_bpp = (u64)dsi_get_pclk_rate(msm_host->mode, msm_host->dsc, is_bonded_dsi) * bpp;
do_div(pclk_bpp, 8);
msm_host->src_clk_rate = pclk_bpp;


--
2.40.1

2023-05-22 21:40:56

by Marijn Suijten

Subject: Re: [PATCH v4 2/5] drm/msm/dsi: Adjust pclk rate for compression

On 2023-05-22 13:30:21, Jessica Zhang wrote:
> Adjust the pclk rate to divide hdisplay by the compression ratio when DSC
> is enabled.
>
> Signed-off-by: Jessica Zhang <[email protected]>

As discussed previously, this patch would apply a lot more cleanly on
top of:

https://lore.kernel.org/linux-arm-msm/[email protected]/T/#u

(This is the v2 that doesn't change the callback, but does change the
code flow so that you have to *touch less lines* in this patch).

- Marijn

> ---
> drivers/gpu/drm/msm/dsi/dsi_host.c | 23 +++++++++++++++++++----
> 1 file changed, 19 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index 18d38b90eb28..d04f8bbd707d 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -561,7 +561,18 @@ void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host)
> clk_disable_unprepare(msm_host->byte_clk);
> }
>
> -static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode, bool is_bonded_dsi)
> +static unsigned long dsi_adjust_compressed_pclk(const struct drm_display_mode *mode,
> + const struct drm_dsc_config *dsc)
> +{
> + int new_hdisplay = DIV_ROUND_UP(mode->hdisplay * drm_dsc_get_bpp_int(dsc),
> + dsc->bits_per_component * 3);
> +
> + return (new_hdisplay + (mode->htotal - mode->hdisplay))
> + * mode->vtotal * drm_mode_vrefresh(mode);
> +}
> +
> +static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode,
> + const struct drm_dsc_config *dsc, bool is_bonded_dsi)
> {
> unsigned long pclk_rate;
>
> @@ -576,6 +587,10 @@ static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode, bool
> if (is_bonded_dsi)
> pclk_rate /= 2;
>
> + /* If DSC is enabled, divide hdisplay by compression ratio */
> + if (dsc)
> + pclk_rate = dsi_adjust_compressed_pclk(mode, dsc);
> +
> return pclk_rate;
> }
>
> @@ -585,7 +600,7 @@ unsigned long dsi_byte_clk_get_rate(struct mipi_dsi_host *host, bool is_bonded_d
> struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
> u8 lanes = msm_host->lanes;
> u32 bpp = dsi_get_bpp(msm_host->format);
> - unsigned long pclk_rate = dsi_get_pclk_rate(mode, is_bonded_dsi);
> + unsigned long pclk_rate = dsi_get_pclk_rate(mode, msm_host->dsc, is_bonded_dsi);
> u64 pclk_bpp = (u64)pclk_rate * bpp;
>
> if (lanes == 0) {
> @@ -604,7 +619,7 @@ unsigned long dsi_byte_clk_get_rate(struct mipi_dsi_host *host, bool is_bonded_d
>
> static void dsi_calc_pclk(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
> {
> - msm_host->pixel_clk_rate = dsi_get_pclk_rate(msm_host->mode, is_bonded_dsi);
> + msm_host->pixel_clk_rate = dsi_get_pclk_rate(msm_host->mode, msm_host->dsc, is_bonded_dsi);
> msm_host->byte_clk_rate = dsi_byte_clk_get_rate(&msm_host->base, is_bonded_dsi,
> msm_host->mode);
>
> @@ -634,7 +649,7 @@ int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
>
> dsi_calc_pclk(msm_host, is_bonded_dsi);
>
> - pclk_bpp = (u64)dsi_get_pclk_rate(msm_host->mode, is_bonded_dsi) * bpp;
> + pclk_bpp = (u64)dsi_get_pclk_rate(msm_host->mode, msm_host->dsc, is_bonded_dsi) * bpp;
> do_div(pclk_bpp, 8);
> msm_host->src_clk_rate = pclk_bpp;
>
>
> --
> 2.40.1
>

2023-05-22 22:47:41

by Jessica Zhang

Subject: Re: [PATCH v4 2/5] drm/msm/dsi: Adjust pclk rate for compression

On 5/22/2023 2:31 PM, Marijn Suijten wrote:
> On 2023-05-22 13:30:21, Jessica Zhang wrote:
>> Adjust the pclk rate to divide hdisplay by the compression ratio when DSC
>> is enabled.
>>
>> Signed-off-by: Jessica Zhang <[email protected]>
>
> As discussed previously, this patch would apply a lot more cleanly on
> top of:
>
> https://lore.kernel.org/linux-arm-msm/[email protected]/T/#u
>
> (This is the v2 that doesn't change the callback, but does change the
> code flow so that you have to *touch less lines* in this patch).

Hi Marijn,

Sounds good. I'll rebase on top of that.

Thanks,

Jessica Zhang

>
> - Marijn
>
>> ---
>> drivers/gpu/drm/msm/dsi/dsi_host.c | 23 +++++++++++++++++++----
>> 1 file changed, 19 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
>> index 18d38b90eb28..d04f8bbd707d 100644
>> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
>> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
>> @@ -561,7 +561,18 @@ void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host)
>> clk_disable_unprepare(msm_host->byte_clk);
>> }
>>
>> -static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode, bool is_bonded_dsi)
>> +static unsigned long dsi_adjust_compressed_pclk(const struct drm_display_mode *mode,
>> + const struct drm_dsc_config *dsc)
>> +{
>> + int new_hdisplay = DIV_ROUND_UP(mode->hdisplay * drm_dsc_get_bpp_int(dsc),
>> + dsc->bits_per_component * 3);
>> +
>> + return (new_hdisplay + (mode->htotal - mode->hdisplay))
>> + * mode->vtotal * drm_mode_vrefresh(mode);
>> +}
>> +
>> +static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode,
>> + const struct drm_dsc_config *dsc, bool is_bonded_dsi)
>> {
>> unsigned long pclk_rate;
>>
>> @@ -576,6 +587,10 @@ static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode, bool
>> if (is_bonded_dsi)
>> pclk_rate /= 2;
>>
>> + /* If DSC is enabled, divide hdisplay by compression ratio */
>> + if (dsc)
>> + pclk_rate = dsi_adjust_compressed_pclk(mode, dsc);
>> +
>> return pclk_rate;
>> }
>>
>> @@ -585,7 +600,7 @@ unsigned long dsi_byte_clk_get_rate(struct mipi_dsi_host *host, bool is_bonded_d
>> struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
>> u8 lanes = msm_host->lanes;
>> u32 bpp = dsi_get_bpp(msm_host->format);
>> - unsigned long pclk_rate = dsi_get_pclk_rate(mode, is_bonded_dsi);
>> + unsigned long pclk_rate = dsi_get_pclk_rate(mode, msm_host->dsc, is_bonded_dsi);
>> u64 pclk_bpp = (u64)pclk_rate * bpp;
>>
>> if (lanes == 0) {
>> @@ -604,7 +619,7 @@ unsigned long dsi_byte_clk_get_rate(struct mipi_dsi_host *host, bool is_bonded_d
>>
>> static void dsi_calc_pclk(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
>> {
>> - msm_host->pixel_clk_rate = dsi_get_pclk_rate(msm_host->mode, is_bonded_dsi);
>> + msm_host->pixel_clk_rate = dsi_get_pclk_rate(msm_host->mode, msm_host->dsc, is_bonded_dsi);
>> msm_host->byte_clk_rate = dsi_byte_clk_get_rate(&msm_host->base, is_bonded_dsi,
>> msm_host->mode);
>>
>> @@ -634,7 +649,7 @@ int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
>>
>> dsi_calc_pclk(msm_host, is_bonded_dsi);
>>
>> - pclk_bpp = (u64)dsi_get_pclk_rate(msm_host->mode, is_bonded_dsi) * bpp;
>> + pclk_bpp = (u64)dsi_get_pclk_rate(msm_host->mode, msm_host->dsc, is_bonded_dsi) * bpp;
>> do_div(pclk_bpp, 8);
>> msm_host->src_clk_rate = pclk_bpp;
>>
>>
>> --
>> 2.40.1
>>