2023-04-05 06:13:15

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [PATCH v3] arm64: dts: qcom: sm8550: add Soundwire controllers

Add nodes for LPASS Soundwire v2.0.0 controllers. Use labels with
indices matching downstream DTS, to make any comparisons easier.

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Changes since v2:
1. Use labels instead of comments (Konrad).
2. Use interrupts instead of interupts-extended (Konrad)

Changes since v1:
1. Correct IO range length.

The bindings and driver are here:
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t

Cc: Patrick Lai <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 109 +++++++++++++++++++++++++++
1 file changed, 109 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index dc6150e97d46..f9eaede39b5b 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -2004,6 +2004,33 @@ lpass_wsa2macro: codec@6aa0000 {
#sound-dai-cells = <1>;
};

+ swr3: soundwire-controller@6ab0000 {
+ compatible = "qcom,soundwire-v2.0.0";
+ reg = <0 0x06ab0000 0 0x10000>;
+ interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&lpass_wsa2macro>;
+ clock-names = "iface";
+ label = "WSA2";
+
+ qcom,din-ports = <4>;
+ qcom,dout-ports = <9>;
+
+ qcom,ports-sinterval = <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x18f 0xff 0xff 0x0f 0x0f 0xff 0x31f>;
+ qcom,ports-offset1 = /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0x06 0x0d 0xff 0x00>;
+ qcom,ports-offset2 = /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
+ qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
+ qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x18>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x00 0x00>;
+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+
+ #address-cells = <2>;
+ #size-cells = <0>;
+ #sound-dai-cells = <1>;
+ status = "disabled";
+ };
+
lpass_rxmacro: codec@6ac0000 {
compatible = "qcom,sm8550-lpass-rx-macro";
reg = <0 0x06ac0000 0 0x1000>;
@@ -2023,6 +2050,33 @@ lpass_rxmacro: codec@6ac0000 {
#sound-dai-cells = <1>;
};

+ swr1: soundwire-controller@6ad0000 {
+ compatible = "qcom,soundwire-v2.0.0";
+ reg = <0 0x06ad0000 0 0x10000>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&lpass_rxmacro>;
+ clock-names = "iface";
+ label = "RX";
+
+ qcom,din-ports = <0>;
+ qcom,dout-ports = <10>;
+
+ qcom,ports-sinterval = <0x03 0x3f 0x1f 0x07 0x00 0x18f 0xff 0xff 0xff 0xff>;
+ qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x00 0x00 0xff 0xff 0xff 0xff>;
+ qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00 0x00 0xff 0xff 0xff 0xff>;
+ qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff>;
+ qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff>;
+ qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff 0x0f 0xff 0xff 0xff 0xff>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff 0x00 0xff 0xff 0xff 0xff>;
+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00 0x00 0xff 0xff 0xff 0xff>;
+ qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00 0x00 0xff 0xff 0xff 0xff>;
+
+ #address-cells = <2>;
+ #size-cells = <0>;
+ #sound-dai-cells = <1>;
+ status = "disabled";
+ };
+
lpass_txmacro: codec@6ae0000 {
compatible = "qcom,sm8550-lpass-tx-macro";
reg = <0 0x06ae0000 0 0x1000>;
@@ -2061,6 +2115,61 @@ lpass_wsamacro: codec@6b00000 {
#sound-dai-cells = <1>;
};

+ swr0: soundwire-controller@6b10000 {
+ compatible = "qcom,soundwire-v2.0.0";
+ reg = <0 0x06b10000 0 0x10000>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&lpass_wsamacro>;
+ clock-names = "iface";
+ label = "WSA";
+
+ qcom,din-ports = <4>;
+ qcom,dout-ports = <9>;
+
+ qcom,ports-sinterval = <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x18f 0xff 0xff 0x0f 0x0f 0xff 0x31f>;
+ qcom,ports-offset1 = /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0x06 0x0d 0xff 0x00>;
+ qcom,ports-offset2 = /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
+ qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
+ qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x18>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x00 0x00>;
+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+
+ #address-cells = <2>;
+ #size-cells = <0>;
+ #sound-dai-cells = <1>;
+ status = "disabled";
+ };
+
+ swr2: soundwire-controller@6d30000 {
+ compatible = "qcom,soundwire-v2.0.0";
+ reg = <0 0x06d30000 0 0x10000>;
+ interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "core", "wakeup";
+ clocks = <&lpass_vamacro>;
+ clock-names = "iface";
+ label = "TX";
+
+ qcom,din-ports = <4>;
+ qcom,dout-ports = <0>;
+ qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>;
+ qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x01 0x01>;
+ qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00 0x00>;
+ qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff>;
+ qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff>;
+ qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff 0xff>;
+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff>;
+ qcom,ports-lane-control = /bits/ 8 <0x01 0x02 0x00 0x00>;
+
+ #address-cells = <2>;
+ #size-cells = <0>;
+ #sound-dai-cells = <1>;
+ status = "disabled";
+ };
+
lpass_vamacro: codec@6d44000 {
compatible = "qcom,sm8550-lpass-va-macro";
reg = <0 0x06d44000 0 0x1000>;
--
2.34.1


2023-04-05 15:47:10

by Konrad Dybcio

[permalink] [raw]
Subject: Re: [PATCH v3] arm64: dts: qcom: sm8550: add Soundwire controllers



On 5.04.2023 08:11, Krzysztof Kozlowski wrote:
> Add nodes for LPASS Soundwire v2.0.0 controllers. Use labels with
> indices matching downstream DTS, to make any comparisons easier.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>

Konrad
>
> Changes since v2:
> 1. Use labels instead of comments (Konrad).
> 2. Use interrupts instead of interupts-extended (Konrad)
>
> Changes since v1:
> 1. Correct IO range length.
>
> The bindings and driver are here:
> https://lore.kernel.org/linux-arm-msm/[email protected]/T/#t
>
> Cc: Patrick Lai <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 109 +++++++++++++++++++++++++++
> 1 file changed, 109 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index dc6150e97d46..f9eaede39b5b 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -2004,6 +2004,33 @@ lpass_wsa2macro: codec@6aa0000 {
> #sound-dai-cells = <1>;
> };
>
> + swr3: soundwire-controller@6ab0000 {
> + compatible = "qcom,soundwire-v2.0.0";
> + reg = <0 0x06ab0000 0 0x10000>;
> + interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&lpass_wsa2macro>;
> + clock-names = "iface";
> + label = "WSA2";
> +
> + qcom,din-ports = <4>;
> + qcom,dout-ports = <9>;
> +
> + qcom,ports-sinterval = <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x18f 0xff 0xff 0x0f 0x0f 0xff 0x31f>;
> + qcom,ports-offset1 = /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0x06 0x0d 0xff 0x00>;
> + qcom,ports-offset2 = /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
> + qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
> + qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
> + qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x18>;
> + qcom,ports-block-pack-mode = /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x00 0x00>;
> + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
> + qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
> +
> + #address-cells = <2>;
> + #size-cells = <0>;
> + #sound-dai-cells = <1>;
> + status = "disabled";
> + };
> +
> lpass_rxmacro: codec@6ac0000 {
> compatible = "qcom,sm8550-lpass-rx-macro";
> reg = <0 0x06ac0000 0 0x1000>;
> @@ -2023,6 +2050,33 @@ lpass_rxmacro: codec@6ac0000 {
> #sound-dai-cells = <1>;
> };
>
> + swr1: soundwire-controller@6ad0000 {
> + compatible = "qcom,soundwire-v2.0.0";
> + reg = <0 0x06ad0000 0 0x10000>;
> + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&lpass_rxmacro>;
> + clock-names = "iface";
> + label = "RX";
> +
> + qcom,din-ports = <0>;
> + qcom,dout-ports = <10>;
> +
> + qcom,ports-sinterval = <0x03 0x3f 0x1f 0x07 0x00 0x18f 0xff 0xff 0xff 0xff>;
> + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x00 0x00 0xff 0xff 0xff 0xff>;
> + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00 0x00 0xff 0xff 0xff 0xff>;
> + qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff>;
> + qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff>;
> + qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff 0x0f 0xff 0xff 0xff 0xff>;
> + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff 0x00 0xff 0xff 0xff 0xff>;
> + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00 0x00 0xff 0xff 0xff 0xff>;
> + qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00 0x00 0xff 0xff 0xff 0xff>;
> +
> + #address-cells = <2>;
> + #size-cells = <0>;
> + #sound-dai-cells = <1>;
> + status = "disabled";
> + };
> +
> lpass_txmacro: codec@6ae0000 {
> compatible = "qcom,sm8550-lpass-tx-macro";
> reg = <0 0x06ae0000 0 0x1000>;
> @@ -2061,6 +2115,61 @@ lpass_wsamacro: codec@6b00000 {
> #sound-dai-cells = <1>;
> };
>
> + swr0: soundwire-controller@6b10000 {
> + compatible = "qcom,soundwire-v2.0.0";
> + reg = <0 0x06b10000 0 0x10000>;
> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&lpass_wsamacro>;
> + clock-names = "iface";
> + label = "WSA";
> +
> + qcom,din-ports = <4>;
> + qcom,dout-ports = <9>;
> +
> + qcom,ports-sinterval = <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x18f 0xff 0xff 0x0f 0x0f 0xff 0x31f>;
> + qcom,ports-offset1 = /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0x06 0x0d 0xff 0x00>;
> + qcom,ports-offset2 = /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
> + qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
> + qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
> + qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x18>;
> + qcom,ports-block-pack-mode = /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x00 0x00>;
> + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
> + qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
> +
> + #address-cells = <2>;
> + #size-cells = <0>;
> + #sound-dai-cells = <1>;
> + status = "disabled";
> + };
> +
> + swr2: soundwire-controller@6d30000 {
> + compatible = "qcom,soundwire-v2.0.0";
> + reg = <0 0x06d30000 0 0x10000>;
> + interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "core", "wakeup";
> + clocks = <&lpass_vamacro>;
> + clock-names = "iface";
> + label = "TX";
> +
> + qcom,din-ports = <4>;
> + qcom,dout-ports = <0>;
> + qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>;
> + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x01 0x01>;
> + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00 0x00>;
> + qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff>;
> + qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff>;
> + qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff>;
> + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff 0xff>;
> + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff>;
> + qcom,ports-lane-control = /bits/ 8 <0x01 0x02 0x00 0x00>;
> +
> + #address-cells = <2>;
> + #size-cells = <0>;
> + #sound-dai-cells = <1>;
> + status = "disabled";
> + };
> +
> lpass_vamacro: codec@6d44000 {
> compatible = "qcom,sm8550-lpass-va-macro";
> reg = <0 0x06d44000 0 0x1000>;

2023-04-07 23:39:09

by Bjorn Andersson

[permalink] [raw]
Subject: Re: [PATCH v3] arm64: dts: qcom: sm8550: add Soundwire controllers

On Wed, 5 Apr 2023 08:11:29 +0200, Krzysztof Kozlowski wrote:
> Add nodes for LPASS Soundwire v2.0.0 controllers. Use labels with
> indices matching downstream DTS, to make any comparisons easier.
>
>

Applied, thanks!

[1/1] arm64: dts: qcom: sm8550: add Soundwire controllers
commit: 61b006389bb7af6da29be4b1c2b93708ffe383a4

Best regards,
--
Bjorn Andersson <[email protected]>