The series adds support for managing bxCAN controllers in single peripheral
configuration.
Unlike stm32f4 SOCs, where bxCAN controllers are only in dual peripheral
configuration, stm32f7 SOCs contain three CAN peripherals, CAN1 and CAN2
in dual peripheral configuration and CAN3 in single peripheral
configuration:
- Dual CAN peripheral configuration:
* CAN1: Primary bxCAN for managing the communication between a secondary
bxCAN and the 512-byte SRAM memory.
* CAN2: Secondary bxCAN with no direct access to the SRAM memory.
This means that the two bxCAN cells share the 512-byte SRAM memory and
CAN2 can't be used without enabling CAN1.
- Single CAN peripheral configuration:
* CAN3: Primary bxCAN with dedicated Memory Access Controller unit and
512-byte SRAM memory.
The driver has been tested on the stm32f769i-discovery board with a
kernel version 5.19.0-rc2 in loopback + silent mode:
ip link set can[0-2] type can bitrate 125000 loopback on listen-only on
ip link set up can0
candump can[0-2] -L &
cansend can[0-2] 300#AC.AB.AD.AE.75.49.AD.D1
Dario Binacchi (4):
dt-bindings: mfd: stm32f7: add binding definition for CAN3
ARM: dts: stm32: add CAN support on stm32f746
ARM: dts: stm32: add pin map for CAN controller on stm32f7
can: bxcan: add support for single peripheral configuration
arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 82 ++++++++++++++++++++++++++
arch/arm/boot/dts/stm32f746.dtsi | 39 ++++++++++++
drivers/net/can/bxcan.c | 20 ++++++-
include/dt-bindings/mfd/stm32f7-rcc.h | 1 +
4 files changed, 139 insertions(+), 3 deletions(-)
--
2.32.0
Add support for bxcan (Basic eXtended CAN controller) to STM32F746. The
chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral
configuration and CAN3 in single peripheral configuration:
- Dual CAN peripheral configuration:
* CAN1: Primary bxCAN for managing the communication between a secondary
bxCAN and the 512-byte SRAM memory.
* CAN2: Secondary bxCAN with no direct access to the SRAM memory.
This means that the two bxCAN cells share the 512-byte SRAM memory and
CAN2 can't be used without enabling CAN1.
- Single CAN peripheral configuration:
* CAN3: Primary bxCAN with dedicated Memory Access Controller unit and
512-byte SRAM memory.
-------------------------------------------------------------------------
| features | CAN1 | CAN2 | CAN 3 |
-------------------------------------------------------------------------
| SRAM | 512-byte shared between CAN1 & CAN2 | 512-byte |
-------------------------------------------------------------------------
| Filters | 26 filters shared between CAN1 & CAN2 | 14 filters |
-------------------------------------------------------------------------
Signed-off-by: Dario Binacchi <[email protected]>
---
arch/arm/boot/dts/stm32f746.dtsi | 39 ++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index dc868e6da40e..70371d9dbb7a 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -257,6 +257,16 @@ rtc: rtc@40002800 {
status = "disabled";
};
+ can3: can@40003400 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x40003400 0x400>;
+ interrupts = <104>, <105>, <106>, <107>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F7_APB1_RESET(CAN3)>;
+ clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
+ status = "disabled";
+ };
+
usart2: serial@40004400 {
compatible = "st,stm32f7-uart";
reg = <0x40004400 0x400>;
@@ -337,6 +347,35 @@ i2c4: i2c@40006000 {
status = "disabled";
};
+ can1: can@40006400 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x40006400 0x200>;
+ interrupts = <19>, <20>, <21>, <22>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F7_APB1_RESET(CAN1)>;
+ clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>;
+ st,can-primary;
+ st,gcan = <&gcan>;
+ status = "disabled";
+ };
+
+ gcan: gcan@40006600 {
+ compatible = "st,stm32f4-gcan", "syscon";
+ reg = <0x40006600 0x200>;
+ clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>;
+ };
+
+ can2: can@40006800 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x40006800 0x200>;
+ interrupts = <63>, <64>, <65>, <66>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F7_APB1_RESET(CAN2)>;
+ clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN2)>;
+ st,gcan = <&gcan>;
+ status = "disabled";
+ };
+
cec: cec@40006c00 {
compatible = "st,stm32-cec";
reg = <0x40006C00 0x400>;
--
2.32.0
Add binding definition for CAN3 peripheral.
Signed-off-by: Dario Binacchi <[email protected]>
---
include/dt-bindings/mfd/stm32f7-rcc.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/mfd/stm32f7-rcc.h b/include/dt-bindings/mfd/stm32f7-rcc.h
index a90f3613c584..8d73a9c51e2b 100644
--- a/include/dt-bindings/mfd/stm32f7-rcc.h
+++ b/include/dt-bindings/mfd/stm32f7-rcc.h
@@ -64,6 +64,7 @@
#define STM32F7_RCC_APB1_TIM14 8
#define STM32F7_RCC_APB1_LPTIM1 9
#define STM32F7_RCC_APB1_WWDG 11
+#define STM32F7_RCC_APB1_CAN3 13
#define STM32F7_RCC_APB1_SPI2 14
#define STM32F7_RCC_APB1_SPI3 15
#define STM32F7_RCC_APB1_SPDIFRX 16
--
2.32.0
Add pin configurations for using CAN controller on stm32f7.
Signed-off-by: Dario Binacchi <[email protected]>
---
arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 82 ++++++++++++++++++++++++++
1 file changed, 82 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi
index c8e6c52fb248..9f65403295ca 100644
--- a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi
@@ -283,6 +283,88 @@ pins2 {
slew-rate = <2>;
};
};
+
+ can1_pins_a: can1-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
+ bias-pull-up;
+ };
+ };
+
+ can1_pins_b: can1-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */
+ bias-pull-up;
+ };
+ };
+
+ can1_pins_c: can1-2 {
+ pins1 {
+ pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */
+ bias-pull-up;
+
+ };
+ };
+
+ can1_pins_d: can1-3 {
+ pins1 {
+ pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
+ bias-pull-up;
+
+ };
+ };
+
+ can2_pins_a: can2-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
+ bias-pull-up;
+ };
+ };
+
+ can2_pins_b: can2-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */
+ bias-pull-up;
+ };
+ };
+
+ can3_pins_a: can3-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */
+ bias-pull-up;
+ };
+ };
+
+ can3_pins_b: can3-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 4, AF11)>; /* CAN3_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */
+ bias-pull-up;
+ };
+ };
};
};
};
--
2.32.0
Add support for bxCAN controller in single peripheral configuration:
- primary bxCAN
- dedicated Memory Access Controller unit
- 512-byte SRAM memory
- 14 fiter banks
Signed-off-by: Dario Binacchi <[email protected]>
---
drivers/net/can/bxcan.c | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/net/can/bxcan.c b/drivers/net/can/bxcan.c
index e26ccd41e3cb..9bcbbb85da6e 100644
--- a/drivers/net/can/bxcan.c
+++ b/drivers/net/can/bxcan.c
@@ -155,6 +155,7 @@ struct bxcan_regs {
u32 reserved0[88]; /* 0x20 */
struct bxcan_mb tx_mb[BXCAN_TX_MB_NUM]; /* 0x180 - tx mailbox */
struct bxcan_mb rx_mb[BXCAN_RX_MB_NUM]; /* 0x1b0 - rx mailbox */
+ u32 reserved1[12]; /* 0x1d0 */
};
struct bxcan_priv {
@@ -922,6 +923,12 @@ static int bxcan_get_berr_counter(const struct net_device *ndev,
return 0;
}
+static const struct regmap_config bxcan_gcan_regmap_config = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+};
+
static int bxcan_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
@@ -942,11 +949,18 @@ static int bxcan_probe(struct platform_device *pdev)
gcan = syscon_regmap_lookup_by_phandle(np, "st,gcan");
if (IS_ERR(gcan)) {
- dev_err(dev, "failed to get shared memory base address\n");
- return PTR_ERR(gcan);
+ primary = true;
+ gcan = devm_regmap_init_mmio(dev,
+ regs + sizeof(struct bxcan_regs),
+ &bxcan_gcan_regmap_config);
+ if (IS_ERR(gcan)) {
+ dev_err(dev, "failed to get filter base address\n");
+ return PTR_ERR(gcan);
+ }
+ } else {
+ primary = of_property_read_bool(np, "st,can-primary");
}
- primary = of_property_read_bool(np, "st,can-primary");
clk = devm_clk_get(dev, NULL);
if (IS_ERR(clk)) {
dev_err(dev, "failed to get clock\n");
--
2.32.0
On 23.04.2023 19:25:28, Dario Binacchi wrote:
> Add support for bxCAN controller in single peripheral configuration:
> - primary bxCAN
> - dedicated Memory Access Controller unit
> - 512-byte SRAM memory
> - 14 fiter banks
>
> Signed-off-by: Dario Binacchi <[email protected]>
>
> ---
>
> drivers/net/can/bxcan.c | 20 +++++++++++++++++---
> 1 file changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/can/bxcan.c b/drivers/net/can/bxcan.c
> index e26ccd41e3cb..9bcbbb85da6e 100644
> --- a/drivers/net/can/bxcan.c
> +++ b/drivers/net/can/bxcan.c
> @@ -155,6 +155,7 @@ struct bxcan_regs {
> u32 reserved0[88]; /* 0x20 */
> struct bxcan_mb tx_mb[BXCAN_TX_MB_NUM]; /* 0x180 - tx mailbox */
> struct bxcan_mb rx_mb[BXCAN_RX_MB_NUM]; /* 0x1b0 - rx mailbox */
> + u32 reserved1[12]; /* 0x1d0 */
> };
>
> struct bxcan_priv {
> @@ -922,6 +923,12 @@ static int bxcan_get_berr_counter(const struct net_device *ndev,
> return 0;
> }
>
> +static const struct regmap_config bxcan_gcan_regmap_config = {
> + .reg_bits = 32,
> + .val_bits = 32,
> + .reg_stride = 4,
> +};
> +
> static int bxcan_probe(struct platform_device *pdev)
> {
> struct device_node *np = pdev->dev.of_node;
> @@ -942,11 +949,18 @@ static int bxcan_probe(struct platform_device *pdev)
>
> gcan = syscon_regmap_lookup_by_phandle(np, "st,gcan");
> if (IS_ERR(gcan)) {
> - dev_err(dev, "failed to get shared memory base address\n");
> - return PTR_ERR(gcan);
> + primary = true;
> + gcan = devm_regmap_init_mmio(dev,
> + regs + sizeof(struct bxcan_regs),
> + &bxcan_gcan_regmap_config);
> + if (IS_ERR(gcan)) {
> + dev_err(dev, "failed to get filter base address\n");
> + return PTR_ERR(gcan);
> + }
This probably works. Can we do better, i.e. without this additional code?
If you add a syscon node for the single instance CAN, too, you don't
need a code change here, right?
> + } else {
> + primary = of_property_read_bool(np, "st,can-primary");
> }
>
> - primary = of_property_read_bool(np, "st,can-primary");
> clk = devm_clk_get(dev, NULL);
> if (IS_ERR(clk)) {
> dev_err(dev, "failed to get clock\n");
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung Nürnberg | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
Hi Marc,
On Sun, Apr 23, 2023 at 9:16 PM Marc Kleine-Budde <[email protected]> wrote:
>
> On 23.04.2023 19:25:28, Dario Binacchi wrote:
> > Add support for bxCAN controller in single peripheral configuration:
> > - primary bxCAN
> > - dedicated Memory Access Controller unit
> > - 512-byte SRAM memory
> > - 14 fiter banks
> >
> > Signed-off-by: Dario Binacchi <[email protected]>
> >
> > ---
> >
> > drivers/net/can/bxcan.c | 20 +++++++++++++++++---
> > 1 file changed, 17 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/net/can/bxcan.c b/drivers/net/can/bxcan.c
> > index e26ccd41e3cb..9bcbbb85da6e 100644
> > --- a/drivers/net/can/bxcan.c
> > +++ b/drivers/net/can/bxcan.c
> > @@ -155,6 +155,7 @@ struct bxcan_regs {
> > u32 reserved0[88]; /* 0x20 */
> > struct bxcan_mb tx_mb[BXCAN_TX_MB_NUM]; /* 0x180 - tx mailbox */
> > struct bxcan_mb rx_mb[BXCAN_RX_MB_NUM]; /* 0x1b0 - rx mailbox */
> > + u32 reserved1[12]; /* 0x1d0 */
> > };
> >
> > struct bxcan_priv {
> > @@ -922,6 +923,12 @@ static int bxcan_get_berr_counter(const struct net_device *ndev,
> > return 0;
> > }
> >
> > +static const struct regmap_config bxcan_gcan_regmap_config = {
> > + .reg_bits = 32,
> > + .val_bits = 32,
> > + .reg_stride = 4,
> > +};
> > +
> > static int bxcan_probe(struct platform_device *pdev)
> > {
> > struct device_node *np = pdev->dev.of_node;
> > @@ -942,11 +949,18 @@ static int bxcan_probe(struct platform_device *pdev)
> >
> > gcan = syscon_regmap_lookup_by_phandle(np, "st,gcan");
> > if (IS_ERR(gcan)) {
> > - dev_err(dev, "failed to get shared memory base address\n");
> > - return PTR_ERR(gcan);
> > + primary = true;
> > + gcan = devm_regmap_init_mmio(dev,
> > + regs + sizeof(struct bxcan_regs),
> > + &bxcan_gcan_regmap_config);
> > + if (IS_ERR(gcan)) {
> > + dev_err(dev, "failed to get filter base address\n");
> > + return PTR_ERR(gcan);
> > + }
>
> This probably works. Can we do better, i.e. without this additional code?
>
> If you add a syscon node for the single instance CAN, too, you don't
> need a code change here, right?
I think so.
I have only one doubt about it. This implementation allows, implicitly, to
distinguish if the peripheral is in single configuration (without handle to the
gcan node) or in double configuration (with handle to the gcan node).
For example, in single configuration the peripheral has 14 filter banks, while
in double configuration there are 26 shared banks. Without code changes, this
kind of information is lost. Is it better then, for future
developments, to add a new
boolean property to the can node of the dts (e.g. single-conf)?
Thanks and regards,
Dario
>
> > + } else {
> > + primary = of_property_read_bool(np, "st,can-primary");
> > }
> >
> > - primary = of_property_read_bool(np, "st,can-primary");
> > clk = devm_clk_get(dev, NULL);
> > if (IS_ERR(clk)) {
> > dev_err(dev, "failed to get clock\n");
>
> Marc
>
> --
> Pengutronix e.K. | Marc Kleine-Budde |
> Embedded Linux | https://www.pengutronix.de |
> Vertretung Nürnberg | Phone: +49-5121-206917-129 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
--
Dario Binacchi
Senior Embedded Linux Developer
[email protected]
__________________________________
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
[email protected]
http://www.amarulasolutions.com
On Sun, 23 Apr 2023, Dario Binacchi wrote:
> Add binding definition for CAN3 peripheral.
>
> Signed-off-by: Dario Binacchi <[email protected]>
> ---
>
> include/dt-bindings/mfd/stm32f7-rcc.h | 1 +
> 1 file changed, 1 insertion(+)
Applied, thanks
--
Lee Jones [李琼斯]
On 24.04.2023 08:56:03, Dario Binacchi wrote:
> > This probably works. Can we do better, i.e. without this additional code?
> >
> > If you add a syscon node for the single instance CAN, too, you don't
> > need a code change here, right?
>
> I think so.
>
> I have only one doubt about it. This implementation allows,
> implicitly, to distinguish if the peripheral is in single
> configuration (without handle to the gcan node) or in double
> configuration (with handle to the gcan node). For example, in single
> configuration the peripheral has 14 filter banks, while in double
> configuration there are 26 shared banks. Without code changes, this
> kind of information is lost. Is it better then, for future
> developments, to add a new boolean property to the can node of the dts
> (e.g. single-conf)?
The DT ist not yet mainline, so we can still change it. Another option
is to have "st,can-primary" and "st,can-secondary" for the shared
peripherals and nothing for the single instance.
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung Nürnberg | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
On Sun, Apr 23, 2023 at 07:25:28PM +0200, Dario Binacchi wrote:
> Add support for bxCAN controller in single peripheral configuration:
> - primary bxCAN
> - dedicated Memory Access Controller unit
> - 512-byte SRAM memory
> - 14 fiter banks
nit: s/fiter/filter/ ?
Hi Marc,
On Mon, Apr 24, 2023 at 12:06 PM Marc Kleine-Budde <[email protected]> wrote:
>
> On 24.04.2023 08:56:03, Dario Binacchi wrote:
> > > This probably works. Can we do better, i.e. without this additional code?
> > >
> > > If you add a syscon node for the single instance CAN, too, you don't
> > > need a code change here, right?
> >
> > I think so.
> >
> > I have only one doubt about it. This implementation allows,
> > implicitly, to distinguish if the peripheral is in single
> > configuration (without handle to the gcan node) or in double
> > configuration (with handle to the gcan node). For example, in single
> > configuration the peripheral has 14 filter banks, while in double
> > configuration there are 26 shared banks. Without code changes, this
> > kind of information is lost. Is it better then, for future
> > developments, to add a new boolean property to the can node of the dts
> > (e.g. single-conf)?
>
> The DT ist not yet mainline, so we can still change it. Another option
> is to have "st,can-primary" and "st,can-secondary" for the shared
> peripherals and nothing for the single instance.
I did some tests following your suggestion. It is however necessary to
make some small changes to the driver.
I will send v2 as soon as possible.
Thanks and regards,
Dario
>
> regards,
> Marc
>
> --
> Pengutronix e.K. | Marc Kleine-Budde |
> Embedded Linux | https://www.pengutronix.de |
> Vertretung Nürnberg | Phone: +49-5121-206917-129 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
--
Dario Binacchi
Senior Embedded Linux Developer
[email protected]
__________________________________
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
[email protected]
http://www.amarulasolutions.com
Hey Lee Jones,
On 24.04.2023 10:02:29, Lee Jones wrote:
> On Sun, 23 Apr 2023, Dario Binacchi wrote:
>
> > Add binding definition for CAN3 peripheral.
> >
> > Signed-off-by: Dario Binacchi <[email protected]>
> > ---
> >
> > include/dt-bindings/mfd/stm32f7-rcc.h | 1 +
> > 1 file changed, 1 insertion(+)
>
> Applied, thanks
I upstreamed the v2 of this series
(https://lore.kernel.org/all/[email protected]/)
that doesn't contain this change to net/main without noticing that the
DT changes in that series depend on it.
This broke the DT compilation of the stm32f746.dtsi in the net/main
tree. I don't see the stm32f7-rcc.h changes in linus/master so I'm
afraid this will break mainline too :/
What are the possible solutions? I see:
1) revert the stm32f746.dtsi changes via net/main
2) upstream the stm32f7-rcc.h changes via net/main, too
3) upstream the stm32f7-rcc.h changes via you tree, so that it hits
mainline in the v6.4 release cycle.
I'm in favor of solution number 1. Thoughts?
Sorry for the mess,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung Nürnberg | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
On 17/05/2023 16:16, Marc Kleine-Budde wrote:
> Hey Lee Jones,
>
> On 24.04.2023 10:02:29, Lee Jones wrote:
>> On Sun, 23 Apr 2023, Dario Binacchi wrote:
>>
>>> Add binding definition for CAN3 peripheral.
>>>
>>> Signed-off-by: Dario Binacchi <[email protected]>
>>> ---
>>>
>>> include/dt-bindings/mfd/stm32f7-rcc.h | 1 +
>>> 1 file changed, 1 insertion(+)
>>
>> Applied, thanks
>
> I upstreamed the v2 of this series
> (https://lore.kernel.org/all/[email protected]/)
> that doesn't contain this change to net/main without noticing that the
> DT changes in that series depend on it.
>
> This broke the DT compilation of the stm32f746.dtsi in the net/main
> tree. I don't see the stm32f7-rcc.h changes in linus/master so I'm
> afraid this will break mainline too :/
>
> What are the possible solutions? I see:
> 1) revert the stm32f746.dtsi changes via net/main
> 2) upstream the stm32f7-rcc.h changes via net/main, too
> 3) upstream the stm32f7-rcc.h changes via you tree, so that it hits
> mainline in the v6.4 release cycle.
>
> I'm in favor of solution number 1. Thoughts?
DTS should never go with driver changes or with driver trees, not only
because it hides ABI breaks but also for above reasons. The best if you
just drop or revert DTS commits, so they can go via platform maintainer.
Best regards,
Krzysztof
On 17.05.2023 17:23:13, Krzysztof Kozlowski wrote:
> On 17/05/2023 16:16, Marc Kleine-Budde wrote:
> > Hey Lee Jones,
> >
> > On 24.04.2023 10:02:29, Lee Jones wrote:
> >> On Sun, 23 Apr 2023, Dario Binacchi wrote:
> >>
> >>> Add binding definition for CAN3 peripheral.
> >>>
> >>> Signed-off-by: Dario Binacchi <[email protected]>
> >>> ---
> >>>
> >>> include/dt-bindings/mfd/stm32f7-rcc.h | 1 +
> >>> 1 file changed, 1 insertion(+)
> >>
> >> Applied, thanks
> >
> > I upstreamed the v2 of this series
> > (https://lore.kernel.org/all/[email protected]/)
> > that doesn't contain this change to net/main without noticing that the
> > DT changes in that series depend on it.
> >
> > This broke the DT compilation of the stm32f746.dtsi in the net/main
> > tree. I don't see the stm32f7-rcc.h changes in linus/master so I'm
> > afraid this will break mainline too :/
> >
> > What are the possible solutions? I see:
> > 1) revert the stm32f746.dtsi changes via net/main
> > 2) upstream the stm32f7-rcc.h changes via net/main, too
> > 3) upstream the stm32f7-rcc.h changes via you tree, so that it hits
> > mainline in the v6.4 release cycle.
> >
> > I'm in favor of solution number 1. Thoughts?
>
> DTS should never go with driver changes or with driver trees, not only
> because it hides ABI breaks but also for above reasons. The best if you
> just drop or revert DTS commits, so they can go via platform maintainer.
Reverted: https://lore.kernel.org/[email protected]
Thanks,
Marc
--
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