This is the final step to achieve USB-C Altmode on the HDK8350
and HDK8450 now DP controller support, USB3+DP Combo PHY and
pmic glink support have been merged for those platforms.
This patchset depends on the QMP Combo USB3+DP PHY orientation
support at [1].
The following has been successfully tested:
- USB-C PD Power Role, reported status are coherent
- USB-C dual-role data
- USB2.0 only (no-PD) as DFP or UFP
- USB2.0 + USB SuperSpeed as DFP or UFP & in both orientations
- USB2.0 + USB SuperSpeed + DisplayPort Altmode in both orientations
- DisplayPort-only Altmode in both orientations
Data role and SuperSpeed lanes were correctly switched on the PHY
side after USB-C removal/insertion.
[1] https://lore.kernel.org/all/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
---
Changes in v3:
- Rebased on next-230523 now PHY patches were applied
- Link to v2: https://lore.kernel.org/r/20230503-topic-sm8450-graphics-dp-next-v2-0-8acbbe1e9d14@linaro.org
Changes in v2:
- rebased on next-230510 + orientation patchset v2
- define port@2 in patches 1 & 2
- Add reviewed tags
- Renamed fsa4480 node name
- Added missing blank line
- Moved status at last position
- Re-ordered node ref
- Fixed commit message of last patch
- Link to v1: https://lore.kernel.org/r/20230503-topic-sm8450-graphics-dp-next-v1-0-d1ee9397f2a6@linaro.org
---
Neil Armstrong (6):
arm64: dts: qcom: sm8350: add ports subnodes in usb1 qmpphy node
arm64: dts: qcom: sm8450: add ports subnodes in usb1 qmpphy node
arm64: dts: qcom: sm8350-hdk: Add QMP & DP to SuperSpeed graph
arm64: dts: qcom: sm8450-hdk: Add QMP & DP to SuperSpeed graph
arm64: defconfig: enable FSA4480 driver as module
qcom: pmic_glink: enable altmode for SM8450
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 76 ++++++++++++++++++++++++++++++++-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 26 +++++++++++
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 73 ++++++++++++++++++++++++++++++-
arch/arm64/boot/dts/qcom/sm8450.dtsi | 26 +++++++++++
arch/arm64/configs/defconfig | 1 +
drivers/soc/qcom/pmic_glink.c | 8 +++-
6 files changed, 204 insertions(+), 6 deletions(-)
---
base-commit: 8e7eb170057ce57f049f7b6749741d7b23d09af2
change-id: 20230503-topic-sm8450-graphics-dp-next-1dab962ae67d
Best regards,
--
Neil Armstrong <[email protected]>
With support for the QMP combo phy to react to USB Type-C switch events,
introduce it as the next hop for the SuperSpeed lanes of the Type-C
connector, and connect the output of the DisplayPort controller
to the QMP combo phy.
This allows the TCPM to perform orientation switching of both USB and
DisplayPort signals.
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 76 ++++++++++++++++++++++++++++++++-
1 file changed, 74 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
index 2ee1b121686a..d3788bd72ac3 100644
--- a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
@@ -58,7 +58,15 @@ port@1 {
reg = <1>;
pmic_glink_ss_in: endpoint {
- remote-endpoint = <&usb_1_dwc3_ss>;
+ remote-endpoint = <&usb_1_qmpphy_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ pmic_glink_sbu: endpoint {
+ remote-endpoint = <&fsa4480_sbu_mux>;
};
};
};
@@ -326,6 +334,37 @@ zap-shader {
};
};
+&i2c13 {
+ clock-frequency = <100000>;
+
+ status = "okay";
+
+ typec-mux@42 {
+ compatible = "fcs,fsa4480";
+ reg = <0x42>;
+
+ interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>;
+
+ vcc-supply = <&vreg_bob>;
+ mode-switch;
+ orientation-switch;
+ svid = /bits/ 16 <0xff01>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ fsa4480_sbu_mux: endpoint {
+ remote-endpoint = <&pmic_glink_sbu>;
+ };
+ };
+ };
+ };
+};
+
&i2c15 {
clock-frequency = <400000>;
status = "okay";
@@ -370,6 +409,21 @@ &mdss {
status = "okay";
};
+&mdss_dp {
+ status = "okay";
+
+ ports {
+ port@1 {
+ reg = <1>;
+
+ mdss_dp0_out: endpoint {
+ data-lanes = <0 1>;
+ remote-endpoint = <&usb_1_qmpphy_dp_in>;
+ };
+ };
+ };
+};
+
&mdss_mdp {
status = "okay";
};
@@ -416,6 +470,10 @@ &qupv3_id_0 {
status = "okay";
};
+&qupv3_id_1 {
+ status = "okay";
+};
+
&qupv3_id_2 {
status = "okay";
};
@@ -716,7 +774,7 @@ &usb_1_dwc3_hs {
};
&usb_1_dwc3_ss {
- remote-endpoint = <&pmic_glink_ss_in>;
+ remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
};
&usb_1_hsphy {
@@ -732,6 +790,20 @@ &usb_1_qmpphy {
vdda-phy-supply = <&vreg_l6b_1p2>;
vdda-pll-supply = <&vreg_l1b_0p88>;
+
+ orientation-switch;
+};
+
+&usb_1_qmpphy_dp_in {
+ remote-endpoint = <&mdss_dp0_out>;
+};
+
+&usb_1_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss_in>;
+};
+
+&usb_1_qmpphy_usb_ss_in {
+ remote-endpoint = <&usb_1_dwc3_ss>;
};
&usb_2 {
--
2.34.1
Add the USB3+DP Combo QMP PHY port subnodes in the SM8350 SoC DTSI
to avoid duplication in the devices DTs.
Signed-off-by: Neil Armstrong <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 3efdc03ed0f1..d9aa591dccf8 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2158,6 +2158,32 @@ usb_1_qmpphy: phy@88e9000 {
#phy-cells = <1>;
status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_1_qmpphy_out: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usb_1_qmpphy_usb_ss_in: endpoint {
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ usb_1_qmpphy_dp_in: endpoint {
+ };
+ };
+ };
};
usb_2_qmpphy: phy-wrapper@88eb000 {
--
2.34.1
With support for the QMP combo phy to react to USB Type-C switch events,
introduce it as the next hop for the SuperSpeed lanes of the Type-C
connector, and connect the output of the DisplayPort controller
to the QMP combo phy.
This allows the TCPM to perform orientation switching of both USB and
DisplayPort signals.
Signed-off-by: Neil Armstrong <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 73 ++++++++++++++++++++++++++++++++-
1 file changed, 71 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
index e931545a2cac..d5aeb7319776 100644
--- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
@@ -114,9 +114,18 @@ port@1 {
reg = <1>;
pmic_glink_ss_in: endpoint {
- remote-endpoint = <&usb_1_dwc3_ss>;
+ remote-endpoint = <&usb_1_qmpphy_out>;
};
};
+
+ port@2 {
+ reg = <2>;
+
+ pmic_glink_sbu: endpoint {
+ remote-endpoint = <&fsa4480_sbu_mux>;
+ };
+ };
+
};
};
};
@@ -494,6 +503,37 @@ lt9611_out: endpoint {
};
};
+&i2c5 {
+ clock-frequency = <100000>;
+
+ status = "okay";
+
+ typec-mux@42 {
+ compatible = "fcs,fsa4480";
+ reg = <0x42>;
+
+ interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>;
+
+ vcc-supply = <&vreg_bob>;
+ mode-switch;
+ orientation-switch;
+ svid = /bits/ 16 <0xff01>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ fsa4480_sbu_mux: endpoint {
+ remote-endpoint = <&pmic_glink_sbu>;
+ };
+ };
+ };
+ };
+};
+
&mdss {
status = "okay";
};
@@ -513,6 +553,21 @@ &mdss_dsi0_phy {
status = "okay";
};
+&mdss_dp0 {
+ status = "okay";
+
+ ports {
+ port@1 {
+ reg = <1>;
+
+ mdss_dp0_out: endpoint {
+ data-lanes = <0 1>;
+ remote-endpoint = <&usb_1_qmpphy_dp_in>;
+ };
+ };
+ };
+};
+
&mdss_mdp {
status = "okay";
};
@@ -766,7 +821,7 @@ &usb_1_dwc3_hs {
};
&usb_1_dwc3_ss {
- remote-endpoint = <&pmic_glink_ss_in>;
+ remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
};
&usb_1_hsphy {
@@ -782,6 +837,20 @@ &usb_1_qmpphy {
vdda-phy-supply = <&vreg_l6b_1p2>;
vdda-pll-supply = <&vreg_l1b_0p91>;
+
+ orientation-switch;
+};
+
+&usb_1_qmpphy_dp_in {
+ remote-endpoint = <&mdss_dp0_out>;
+};
+
+&usb_1_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss_in>;
+};
+
+&usb_1_qmpphy_usb_ss_in {
+ remote-endpoint = <&usb_1_dwc3_ss>;
};
&vamacro {
--
2.34.1
On Tue, 23 May 2023 09:15:44 +0200, Neil Armstrong wrote:
> This is the final step to achieve USB-C Altmode on the HDK8350
> and HDK8450 now DP controller support, USB3+DP Combo PHY and
> pmic glink support have been merged for those platforms.
>
> This patchset depends on the QMP Combo USB3+DP PHY orientation
> support at [1].
>
> [...]
Applied, thanks!
[1/6] arm64: dts: qcom: sm8350: add ports subnodes in usb1 qmpphy node
commit: d831312557e7308cdb59da5b3a228175e8d7738d
[2/6] arm64: dts: qcom: sm8450: add ports subnodes in usb1 qmpphy node
commit: e5167da381a71eeeac13d8ec299ac7c597622b23
[3/6] arm64: dts: qcom: sm8350-hdk: Add QMP & DP to SuperSpeed graph
commit: a3e42da4f712ca7fb3c9b1543f11ad82100e9914
[4/6] arm64: dts: qcom: sm8450-hdk: Add QMP & DP to SuperSpeed graph
commit: b002bac7b4847aa11a6a56d14b2d75d4118f9591
Best regards,
--
Bjorn Andersson <[email protected]>