Like MSM8974 the MSM8226 SoC also contains some OCMEM but it has just
one region for graphics compared to 8974.
While adding support I found a bug in the existing driver that is being
fixed in this series also and the rest of the matches are mostly
preparations for MSM8226 support.
Signed-off-by: Luca Weiss <[email protected]>
---
Changes in v2:
- dt-bindings: add hw version hint to msm8974 & msm8226 variant (Konrad)
- dt-bindings: add constraints for clock (Konrad)
- Pick up tags
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Luca Weiss (6):
soc: qcom: ocmem: Fix NUM_PORTS & NUM_MACROS macros
soc: qcom: ocmem: Use dev_err_probe where appropriate
soc: qcom: ocmem: make iface clock optional
dt-bindings: sram: qcom,ocmem: Add msm8226 support
soc: qcom: ocmem: Add support for msm8226
ARM: dts: qcom: msm8226: Add ocmem
.../devicetree/bindings/sram/qcom,ocmem.yaml | 20 ++++++-
arch/arm/boot/dts/qcom-msm8226.dtsi | 17 ++++++
drivers/soc/qcom/ocmem.c | 67 ++++++++++++----------
3 files changed, 72 insertions(+), 32 deletions(-)
---
base-commit: 8a80314554f679bc440e2affd842ece2048031ea
change-id: 20230506-msm8226-ocmem-bee17571e8eb
Best regards,
--
Luca Weiss <[email protected]>
Add the compatible for the OCMEM found on msm8226 which compared to
msm8974 only has a core clock and no iface clock.
Signed-off-by: Luca Weiss <[email protected]>
---
.../devicetree/bindings/sram/qcom,ocmem.yaml | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml
index 4bbf6db0b6bd..02e4da9649fd 100644
--- a/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml
+++ b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml
@@ -15,7 +15,9 @@ description: |
properties:
compatible:
- const: qcom,msm8974-ocmem
+ enum:
+ - qcom,msm8226-ocmem # v1.1.0
+ - qcom,msm8974-ocmem # v1.4.0
reg:
items:
@@ -28,11 +30,13 @@ properties:
- const: mem
clocks:
+ minItems: 1
items:
- description: Core clock
- description: Interface clock
clock-names:
+ minItems: 1
items:
- const: core
- const: iface
@@ -58,6 +62,20 @@ required:
additionalProperties: false
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,msm8974-ocmem
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ clock-names:
+ minItems: 2
+
patternProperties:
"-sram@[0-9a-f]+$":
type: object
--
2.40.1
Add a node for the ocmem found on msm8226. It contains one region, used
as gmu_ram.
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm/boot/dts/qcom-msm8226.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
index 42acb9ddb8cc..7ad073eb85c8 100644
--- a/arch/arm/boot/dts/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
@@ -636,6 +636,23 @@ smd-edge {
label = "lpass";
};
};
+
+ sram@fdd00000 {
+ compatible = "qcom,msm8226-ocmem";
+ reg = <0xfdd00000 0x2000>,
+ <0xfec00000 0x20000>;
+ reg-names = "ctrl", "mem";
+ ranges = <0 0xfec00000 0x20000>;
+ clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>;
+ clock-names = "core";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ gmu_sram: gmu-sram@0 {
+ reg = <0x0 0x20000>;
+ };
+ };
};
timer {
--
2.40.1
Use dev_err_probe in the driver probe function where useful, to simplify
getting PTR_ERR and to ensure the underlying errors are included in the
error message.
Reviewed-by: Caleb Connolly <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
---
drivers/soc/qcom/ocmem.c | 23 ++++++++---------------
1 file changed, 8 insertions(+), 15 deletions(-)
diff --git a/drivers/soc/qcom/ocmem.c b/drivers/soc/qcom/ocmem.c
index c3e78411c637..a11a955a1327 100644
--- a/drivers/soc/qcom/ocmem.c
+++ b/drivers/soc/qcom/ocmem.c
@@ -317,18 +317,13 @@ static int ocmem_dev_probe(struct platform_device *pdev)
ocmem->config = device_get_match_data(dev);
ret = devm_clk_bulk_get(dev, ARRAY_SIZE(ocmem_clks), ocmem_clks);
- if (ret) {
- if (ret != -EPROBE_DEFER)
- dev_err(dev, "Unable to get clocks\n");
-
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret, "Unable to get clocks\n");
ocmem->mmio = devm_platform_ioremap_resource_byname(pdev, "ctrl");
- if (IS_ERR(ocmem->mmio)) {
- dev_err(&pdev->dev, "Failed to ioremap ocmem_ctrl resource\n");
- return PTR_ERR(ocmem->mmio);
- }
+ if (IS_ERR(ocmem->mmio))
+ return dev_err_probe(&pdev->dev, PTR_ERR(ocmem->mmio),
+ "Failed to ioremap ocmem_ctrl resource\n");
ocmem->memory = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"mem");
@@ -341,16 +336,14 @@ static int ocmem_dev_probe(struct platform_device *pdev)
WARN_ON(clk_set_rate(ocmem_clks[OCMEM_CLK_CORE_IDX].clk, 1000) < 0);
ret = clk_bulk_prepare_enable(ARRAY_SIZE(ocmem_clks), ocmem_clks);
- if (ret) {
- dev_info(ocmem->dev, "Failed to enable clocks\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(ocmem->dev, ret, "Failed to enable clocks\n");
if (qcom_scm_restore_sec_cfg_available()) {
dev_dbg(dev, "configuring scm\n");
ret = qcom_scm_restore_sec_cfg(QCOM_SCM_OCMEM_DEV_ID, 0);
if (ret) {
- dev_err(dev, "Could not enable secure configuration\n");
+ dev_err_probe(dev, ret, "Could not enable secure configuration\n");
goto err_clk_disable;
}
}
--
2.40.1
The msm8226 SoC also contains OCMEM but with one region only.
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
---
drivers/soc/qcom/ocmem.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/soc/qcom/ocmem.c b/drivers/soc/qcom/ocmem.c
index 6235065d3bc9..d5892ce999c9 100644
--- a/drivers/soc/qcom/ocmem.c
+++ b/drivers/soc/qcom/ocmem.c
@@ -413,12 +413,18 @@ static int ocmem_dev_remove(struct platform_device *pdev)
return 0;
}
+static const struct ocmem_config ocmem_8226_config = {
+ .num_regions = 1,
+ .macro_size = SZ_128K,
+};
+
static const struct ocmem_config ocmem_8974_config = {
.num_regions = 3,
.macro_size = SZ_128K,
};
static const struct of_device_id ocmem_of_match[] = {
+ { .compatible = "qcom,msm8226-ocmem", .data = &ocmem_8226_config },
{ .compatible = "qcom,msm8974-ocmem", .data = &ocmem_8974_config },
{ }
};
--
2.40.1
Some platforms such as msm8226 do not have an iface clk. Since clk_bulk
APIs don't offer to a way to treat some clocks as optional simply add
core_clk and iface_clk members to our drvdata.
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Luca Weiss <[email protected]>
---
drivers/soc/qcom/ocmem.c | 42 ++++++++++++++++++++++++------------------
1 file changed, 24 insertions(+), 18 deletions(-)
diff --git a/drivers/soc/qcom/ocmem.c b/drivers/soc/qcom/ocmem.c
index a11a955a1327..6235065d3bc9 100644
--- a/drivers/soc/qcom/ocmem.c
+++ b/drivers/soc/qcom/ocmem.c
@@ -54,6 +54,8 @@ struct ocmem {
const struct ocmem_config *config;
struct resource *memory;
void __iomem *mmio;
+ struct clk *core_clk;
+ struct clk *iface_clk;
unsigned int num_ports;
unsigned int num_macros;
bool interleaved;
@@ -91,16 +93,6 @@ struct ocmem {
#define OCMEM_PSGSC_CTL_MACRO2_MODE(val) FIELD_PREP(0x00000700, (val))
#define OCMEM_PSGSC_CTL_MACRO3_MODE(val) FIELD_PREP(0x00007000, (val))
-#define OCMEM_CLK_CORE_IDX 0
-static struct clk_bulk_data ocmem_clks[] = {
- {
- .id = "core",
- },
- {
- .id = "iface",
- },
-};
-
static inline void ocmem_write(struct ocmem *ocmem, u32 reg, u32 data)
{
writel(data, ocmem->mmio + reg);
@@ -316,9 +308,15 @@ static int ocmem_dev_probe(struct platform_device *pdev)
ocmem->dev = dev;
ocmem->config = device_get_match_data(dev);
- ret = devm_clk_bulk_get(dev, ARRAY_SIZE(ocmem_clks), ocmem_clks);
- if (ret)
- return dev_err_probe(dev, ret, "Unable to get clocks\n");
+ ocmem->core_clk = devm_clk_get(dev, "core");
+ if (IS_ERR(ocmem->core_clk))
+ return dev_err_probe(dev, PTR_ERR(ocmem->core_clk),
+ "Unable to get core clock\n");
+
+ ocmem->iface_clk = devm_clk_get_optional(dev, "iface");
+ if (IS_ERR(ocmem->iface_clk))
+ return dev_err_probe(dev, PTR_ERR(ocmem->iface_clk),
+ "Unable to get iface clock\n");
ocmem->mmio = devm_platform_ioremap_resource_byname(pdev, "ctrl");
if (IS_ERR(ocmem->mmio))
@@ -333,11 +331,15 @@ static int ocmem_dev_probe(struct platform_device *pdev)
}
/* The core clock is synchronous with graphics */
- WARN_ON(clk_set_rate(ocmem_clks[OCMEM_CLK_CORE_IDX].clk, 1000) < 0);
+ WARN_ON(clk_set_rate(ocmem->core_clk, 1000) < 0);
+
+ ret = clk_prepare_enable(ocmem->core_clk);
+ if (ret)
+ return dev_err_probe(ocmem->dev, ret, "Failed to enable core clock\n");
- ret = clk_bulk_prepare_enable(ARRAY_SIZE(ocmem_clks), ocmem_clks);
+ ret = clk_prepare_enable(ocmem->iface_clk);
if (ret)
- return dev_err_probe(ocmem->dev, ret, "Failed to enable clocks\n");
+ return dev_err_probe(ocmem->dev, ret, "Failed to enable iface clock\n");
if (qcom_scm_restore_sec_cfg_available()) {
dev_dbg(dev, "configuring scm\n");
@@ -396,13 +398,17 @@ static int ocmem_dev_probe(struct platform_device *pdev)
return 0;
err_clk_disable:
- clk_bulk_disable_unprepare(ARRAY_SIZE(ocmem_clks), ocmem_clks);
+ clk_disable_unprepare(ocmem->core_clk);
+ clk_disable_unprepare(ocmem->iface_clk);
return ret;
}
static int ocmem_dev_remove(struct platform_device *pdev)
{
- clk_bulk_disable_unprepare(ARRAY_SIZE(ocmem_clks), ocmem_clks);
+ struct ocmem *ocmem = platform_get_drvdata(pdev);
+
+ clk_disable_unprepare(ocmem->core_clk);
+ clk_disable_unprepare(ocmem->iface_clk);
return 0;
}
--
2.40.1
On Tue, May 23, 2023 at 10:55:11PM +0200, Luca Weiss wrote:
> Add the compatible for the OCMEM found on msm8226 which compared to
> msm8974 only has a core clock and no iface clock.
>
> Signed-off-by: Luca Weiss <[email protected]>
Could you please either send me the cover-letter or include the
changelog in the patch under the ---?
Otherwise,
Reviewed-by: Conor Dooley <[email protected]>
Thanks,
Conor.
On Wed, May 24, 2023 at 09:34:06PM +0100, Conor Dooley wrote:
> On Tue, May 23, 2023 at 10:55:11PM +0200, Luca Weiss wrote:
> > Add the compatible for the OCMEM found on msm8226 which compared to
> > msm8974 only has a core clock and no iface clock.
> >
> > Signed-off-by: Luca Weiss <[email protected]>
>
> Could you please either send me the cover-letter or include the
> changelog in the patch under the ---?
Apparently I did get the cover, but in another mailbox for IDK what
reason. Sorry!
>
> Otherwise,
> Reviewed-by: Conor Dooley <[email protected]>
>
> Thanks,
> Conor.
On 23/05/2023 22:55, Luca Weiss wrote:
> Add the compatible for the OCMEM found on msm8226 which compared to
> msm8974 only has a core clock and no iface clock.
>
> Signed-off-by: Luca Weiss <[email protected]>
> ---
> .../devicetree/bindings/sram/qcom,ocmem.yaml | 20 +++++++++++++++++++-
> 1 file changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml
> index 4bbf6db0b6bd..02e4da9649fd 100644
> --- a/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml
> +++ b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml
> @@ -15,7 +15,9 @@ description: |
>
> properties:
> compatible:
> - const: qcom,msm8974-ocmem
> + enum:
> + - qcom,msm8226-ocmem # v1.1.0
> + - qcom,msm8974-ocmem # v1.4.0
>
> reg:
> items:
> @@ -28,11 +30,13 @@ properties:
> - const: mem
>
> clocks:
> + minItems: 1
> items:
> - description: Core clock
> - description: Interface clock
>
> clock-names:
> + minItems: 1
> items:
> - const: core
> - const: iface
> @@ -58,6 +62,20 @@ required:
>
> additionalProperties: false
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,msm8974-ocmem
> + then:
> + properties:
> + clocks:
> + minItems: 2
> + clock-names:
> + minItems: 2
else:
maxItems: 1?
Best regards,
Krzysztof