2023-05-12 07:40:22

by Alexis Lothoré

Subject: [PATCH net v3 1/3] net: dsa: rzn1-a5psw: enable management frames for CPU port

From: Clément Léger <[email protected]>

Currently, management frame were discarded before reaching the CPU port due
to a misconfiguration of the MGMT_CONFIG register. Enable them by setting
the correct value in this register in order to correctly receive management
frame and handle STP.

Fixes: 888cdb892b61 ("net: dsa: rzn1-a5psw: add Renesas RZ/N1 advanced 5 port switch driver")
Signed-off-by: Clément Léger <[email protected]>
Signed-off-by: Alexis Lothoré <[email protected]>
---
Changes since v2:
- move A5PSW_MGMT_CFG_ENABLE definition in this commit
---
drivers/net/dsa/rzn1_a5psw.c | 2 +-
drivers/net/dsa/rzn1_a5psw.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dsa/rzn1_a5psw.c b/drivers/net/dsa/rzn1_a5psw.c
index 919027cf2012..8a419e2ffe2a 100644
--- a/drivers/net/dsa/rzn1_a5psw.c
+++ b/drivers/net/dsa/rzn1_a5psw.c
@@ -673,7 +673,7 @@ static int a5psw_setup(struct dsa_switch *ds)
}

/* Configure management port */
- reg = A5PSW_CPU_PORT | A5PSW_MGMT_CFG_DISCARD;
+ reg = A5PSW_CPU_PORT | A5PSW_MGMT_CFG_ENABLE;
a5psw_reg_writel(a5psw, A5PSW_MGMT_CFG, reg);

/* Set pattern 0 to forward all frame to mgmt port */
diff --git a/drivers/net/dsa/rzn1_a5psw.h b/drivers/net/dsa/rzn1_a5psw.h
index c67abd49c013..b4fbf453ff74 100644
--- a/drivers/net/dsa/rzn1_a5psw.h
+++ b/drivers/net/dsa/rzn1_a5psw.h
@@ -36,7 +36,7 @@
#define A5PSW_INPUT_LEARN_BLOCK(p) BIT(p)

#define A5PSW_MGMT_CFG 0x20
-#define A5PSW_MGMT_CFG_DISCARD BIT(7)
+#define A5PSW_MGMT_CFG_ENABLE BIT(6)

#define A5PSW_MODE_CFG 0x24
#define A5PSW_MODE_STATS_RESET BIT(31)
--
2.40.1

2023-05-12 14:31:55

by Piotr Raczynski

Subject: Re: [PATCH net v3 1/3] net: dsa: rzn1-a5psw: enable management frames for CPU port

On Fri, May 12, 2023 at 09:27:10AM +0200, [email protected] wrote:
> From: Cl?ment L?ger <[email protected]>
>
> Currently, management frame were discarded before reaching the CPU port due
> to a misconfiguration of the MGMT_CONFIG register. Enable them by setting
> the correct value in this register in order to correctly receive management
> frame and handle STP.
>
> Fixes: 888cdb892b61 ("net: dsa: rzn1-a5psw: add Renesas RZ/N1 advanced 5 port switch driver")
> Signed-off-by: Cl?ment L?ger <[email protected]>
> Signed-off-by: Alexis Lothor? <[email protected]>
> ---
> Changes since v2:
> - move A5PSW_MGMT_CFG_ENABLE definition in this commit
> ---
Looks OK, thanks.
Reviewed-by: Piotr Raczynski <[email protected]>