2023-05-14 17:25:04

by Jisheng Zhang

[permalink] [raw]
Subject: [PATCH v3 09/10] MAINTAINERS: riscv: add entry for Bouffalolab SoC

Add Jisheng Zhang as Bouffalolab SoC maintainer.

Signed-off-by: Jisheng Zhang <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Acked-by: Palmer Dabbelt <[email protected]>
---
MAINTAINERS | 7 +++++++
1 file changed, 7 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index e0ad886d3163..0ae136f2656f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -18115,6 +18115,13 @@ F: arch/riscv/
N: riscv
K: riscv

+RISC-V BOUFFALOLAB SOC SUPPORT
+M: Jisheng Zhang <[email protected]>
+L: [email protected]
+S: Maintained
+F: arch/riscv/boot/dts/bouffalolab/
+F: drivers/tty/serial/bflb_uart.c
+
RISC-V MICROCHIP FPGA SUPPORT
M: Conor Dooley <[email protected]>
M: Daire McNamara <[email protected]>
--
2.40.0