Hi Linus,
Please pull a single x86/urgent change for 6.4-rc4. This works around
and issue where the INVLPG instruction may miss invalidating kernel
TLB entries. I do expect an eventual microcode fix for this. When
the microcode version numbers are known, we can circle back around and
add them the model table to disable this workaround.
--
The following changes since commit 7d8accfaa0ab65e4282c8e58950f7d688342cd86:
hwmon: (k10temp) Add PCI ID for family 19, model 78h (2023-05-08 11:36:19 +0200)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git tags/x86_urgent_for_6.4-rc4
for you to fetch changes up to ce0b15d11ad837fbacc5356941712218e38a0a83:
x86/mm: Avoid incomplete Global INVLPG flushes (2023-05-17 08:55:02 -0700)
----------------------------------------------------------------
Work around a TLB invalidation issue in recent hybrid CPUs
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Dave Hansen (1):
x86/mm: Avoid incomplete Global INVLPG flushes
arch/x86/mm/init.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)