Rajan, Jolly and Manish are no longer work for AMD/Xilinx and there is no
activity from them to continue to maintain bindings that's why remove them.
Signed-off-by: Michal Simek <[email protected]>
---
Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml | 2 --
.../bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml | 1 -
.../bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml | 1 -
.../devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 1 -
4 files changed, 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
index 93ae349cf9e9..5cbb34d0b61b 100644
--- a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
+++ b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
@@ -8,8 +8,6 @@ title: Xilinx Versal clock controller
maintainers:
- Michal Simek <[email protected]>
- - Jolly Shah <[email protected]>
- - Rajan Vaja <[email protected]>
description: |
The clock controller is a hardware block of Xilinx versal clock tree. It
diff --git a/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml b/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
index 6b62d5d83476..87ff9ee098f5 100644
--- a/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
@@ -8,7 +8,6 @@ title: Synopsys DesignWare Universal Multi-Protocol Memory Controller
maintainers:
- Krzysztof Kozlowski <[email protected]>
- - Manish Narani <[email protected]>
- Michal Simek <[email protected]>
description: |
diff --git a/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml b/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml
index 7864a1c994eb..75143db51411 100644
--- a/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml
@@ -8,7 +8,6 @@ title: Zynq A05 DDR Memory Controller
maintainers:
- Krzysztof Kozlowski <[email protected]>
- - Manish Narani <[email protected]>
- Michal Simek <[email protected]>
description:
diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
index cdebfa991e06..24ad0614e61b 100644
--- a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
@@ -8,7 +8,6 @@ title: Xilinx ZynqMP Pinctrl
maintainers:
- Sai Krishna Potthuri <[email protected]>
- - Rajan Vaja <[email protected]>
description: |
Please refer to pinctrl-bindings.txt in this directory for details of the
--
2.36.1
On Tue, May 23, 2023 at 09:56:57AM +0200, Michal Simek wrote:
> Rajan, Jolly and Manish are no longer work for AMD/Xilinx and there is no
> activity from them to continue to maintain bindings that's why remove them.
>
> Signed-off-by: Michal Simek <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Thanks,
Conor.
On 5/23/23 09:56, Michal Simek wrote:
> Rajan, Jolly and Manish are no longer work for AMD/Xilinx and there is no
> activity from them to continue to maintain bindings that's why remove them.
>
> Signed-off-by: Michal Simek <[email protected]>
> ---
>
> Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml | 2 --
> .../bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml | 1 -
> .../bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml | 1 -
> .../devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 1 -
> 4 files changed, 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
> index 93ae349cf9e9..5cbb34d0b61b 100644
> --- a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
> +++ b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
> @@ -8,8 +8,6 @@ title: Xilinx Versal clock controller
>
> maintainers:
> - Michal Simek <[email protected]>
> - - Jolly Shah <[email protected]>
> - - Rajan Vaja <[email protected]>
>
> description: |
> The clock controller is a hardware block of Xilinx versal clock tree. It
> diff --git a/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml b/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
> index 6b62d5d83476..87ff9ee098f5 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
> +++ b/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
> @@ -8,7 +8,6 @@ title: Synopsys DesignWare Universal Multi-Protocol Memory Controller
>
> maintainers:
> - Krzysztof Kozlowski <[email protected]>
> - - Manish Narani <[email protected]>
> - Michal Simek <[email protected]>
>
> description: |
> diff --git a/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml b/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml
> index 7864a1c994eb..75143db51411 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml
> +++ b/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml
> @@ -8,7 +8,6 @@ title: Zynq A05 DDR Memory Controller
>
> maintainers:
> - Krzysztof Kozlowski <[email protected]>
> - - Manish Narani <[email protected]>
> - Michal Simek <[email protected]>
>
> description:
> diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
> index cdebfa991e06..24ad0614e61b 100644
> --- a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
> @@ -8,7 +8,6 @@ title: Xilinx ZynqMP Pinctrl
>
> maintainers:
> - Sai Krishna Potthuri <[email protected]>
> - - Rajan Vaja <[email protected]>
>
> description: |
> Please refer to pinctrl-bindings.txt in this directory for details of the
Applied.
M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: http://www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs
TF-A maintainer - Xilinx ZynqMP/Versal/Versal NET SoCs