Hi,
Series convert AT91 shutdown controllers documentation to YAML.
Along with it device trees were updated and also entries to
MAINTAINERS with documentation files.
Thank you,
Claudiu
Changes in v2:
- use minimum, maximum on uint32 enums instead of all possible values
- change commit description for patch 3/4 to explain why there is a
syscon along with microchip,sama7g5-shdwc
- remove | near description entries
Claudiu Beznea (4):
ARM: dts: at91: use generic name for shutdown controller
dt-bindings: power: reset: atmel,at91sam9260-shdwc: convert to yaml
dt-bindings: power: reset: atmel,sama5d2-shdwc: convert to yaml
MAINTAINERS: add documentation file for Microchip SAMA5D2 shutdown
controller
.../devicetree/bindings/arm/atmel-sysregs.txt | 94 --------------
.../power/reset/atmel,at91sam9260-shdwc.yaml | 82 +++++++++++++
.../power/reset/atmel,sama5d2-shdwc.yaml | 115 ++++++++++++++++++
MAINTAINERS | 1 +
arch/arm/boot/dts/at91-qil_a9260.dts | 2 +-
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 2 +-
arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 2 +-
arch/arm/boot/dts/at91-sama5d2_xplained.dts | 2 +-
arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
arch/arm/boot/dts/at91sam9260ek.dts | 2 +-
arch/arm/boot/dts/at91sam9261.dtsi | 2 +-
arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 2 +-
arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
arch/arm/boot/dts/at91sam9rl.dtsi | 2 +-
arch/arm/boot/dts/at91sam9x5.dtsi | 2 +-
arch/arm/boot/dts/sam9x60.dtsi | 2 +-
arch/arm/boot/dts/sama5d2.dtsi | 2 +-
arch/arm/boot/dts/sama5d3.dtsi | 2 +-
arch/arm/boot/dts/sama5d4.dtsi | 2 +-
arch/arm/boot/dts/sama7g5.dtsi | 2 +-
arch/arm/boot/dts/usb_a9260.dts | 2 +-
arch/arm/boot/dts/usb_a9263.dts | 2 +-
24 files changed, 218 insertions(+), 114 deletions(-)
create mode 100644 Documentation/devicetree/bindings/power/reset/atmel,at91sam9260-shdwc.yaml
create mode 100644 Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
--
2.34.1
Convert Atmel SAMA5D2 shutdown controller to YAML. SAMA7G5 SHDWC DT node
(available in arch/arm/boot/dts/sama7g5.dtsi) has syscon along with its
compatible. There is no usage of this syscon in the current code but it
may be necessary in future as some registers of SHDWC are accessed in
different drivers (at91-sama5d2_shdwc.c and arch/arm/mach-at91/pm.c).
Thus update the YAML with it to make DT checkers happy.
Signed-off-by: Claudiu Beznea <[email protected]>
---
.../devicetree/bindings/arm/atmel-sysregs.txt | 63 ----------
.../power/reset/atmel,sama5d2-shdwc.yaml | 115 ++++++++++++++++++
2 files changed, 115 insertions(+), 63 deletions(-)
create mode 100644 Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index e6b2fb291b45..67a66bf74895 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -52,69 +52,6 @@ Example:
reg = <0xe3804000 0x1000>;
};
-SHDWC SAMA5D2-Compatible Shutdown Controller
-
-1) shdwc node
-
-required properties:
-- compatible: should be "atmel,sama5d2-shdwc", "microchip,sam9x60-shdwc" or
- "microchip,sama7g5-shdwc"
-- reg: should contain registers location and length
-- clocks: phandle to input clock.
-- #address-cells: should be one. The cell is the wake-up input index.
-- #size-cells: should be zero.
-
-optional properties:
-
-- debounce-delay-us: minimum wake-up inputs debouncer period in
- microseconds. It's usually a board-related property.
-- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
-
-optional microchip,sam9x60-shdwc or microchip,sama7g5-shdwc properties:
-- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
-
-The node contains child nodes for each wake-up input that the platform uses.
-
-2) input nodes
-
-Wake-up input nodes are usually described in the "board" part of the Device
-Tree. Note also that input 0 is linked to the wake-up pin and is frequently
-used.
-
-Required properties:
-- reg: should contain the wake-up input index [0 - 15].
-
-Optional properties:
-- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
- by the child, forces the wake-up of the core power supply on a high level.
- The default is to be active low.
-
-Example:
-
-On the SoC side:
- shdwc@f8048010 {
- compatible = "atmel,sama5d2-shdwc";
- reg = <0xf8048010 0x10>;
- clocks = <&clk32k>;
- #address-cells = <1>;
- #size-cells = <0>;
- atmel,wakeup-rtc-timer;
- };
-
-On the board side:
- shdwc@f8048010 {
- debounce-delay-us = <976>;
-
- input@0 {
- reg = <0>;
- };
-
- input@1 {
- reg = <1>;
- atmel,wakeup-active-high;
- };
- };
-
Special Function Registers (SFR)
Special Function Registers (SFR) manage specific aspects of the integrated
diff --git a/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
new file mode 100644
index 000000000000..31a16a354a3a
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
@@ -0,0 +1,115 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/reset/atmel,sama5d2-shdwc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel SAMA5D2 SHDWC Shutdown Controller
+
+maintainers:
+ - Claudiu Beznea <[email protected]>
+
+description:
+ Atmel SHDWC shutdown controller controls the power supplies VDDIO and VDDCORE
+ and the wake-up detection on debounced input lines.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: microchip,sama7g5-shdwc
+ - const: syscon
+ - items:
+ enum:
+ - atmel,sama5d2-shdwc
+ - microchip,sam9x60-shdwc
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ debounce-delay-us:
+ description:
+ Minimum wake-up inputs debouncer period in microseconds. It is usually a
+ board-related property.
+
+ atmel,wakeup-rtc-timer:
+ description: enable real-time clock wake-up
+ type: boolean
+
+patternProperties:
+ "^input@[0-15]$":
+ description:
+ Wake-up input nodes. These are usually described in the "board" part of
+ the Device Tree. Note also that input 0 is linked to the wake-up pin and
+ is frequently used.
+ type: object
+ properties:
+ reg:
+ description: contains the wake-up input index
+ minimum: 0
+ maximum: 15
+
+ atmel,wakeup-active-high:
+ description:
+ The corresponding wake-up input described by the child forces the
+ wake-up of the core power supply on a high level. The default is to
+ be active low.
+ type: boolean
+
+ required:
+ - reg
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - microchip,sam9x60-shdwc
+ - microchip,sama7g5-shdwc
+ then:
+ properties:
+ atmel,wakeup-rtt-timer:
+ description: enable real-time timer wake-up
+ type: boolean
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ shdwc: poweroff@f8048010 {
+ compatible = "atmel,sama5d2-shdwc";
+ reg = <0xf8048010 0x10>;
+ clocks = <&clk32k>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ atmel,wakeup-rtc-timer;
+ debounce-delay-us = <976>;
+
+ input@0 {
+ reg = <0>;
+ };
+
+ input@1 {
+ reg = <1>;
+ atmel,wakeup-active-high;
+ };
+ };
+
+...
--
2.34.1
Use poweroff generic name for shdwc node to cope with device tree
specifications.
Signed-off-by: Claudiu Beznea <[email protected]>
---
arch/arm/boot/dts/at91-qil_a9260.dts | 2 +-
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 2 +-
arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 2 +-
arch/arm/boot/dts/at91-sama5d2_xplained.dts | 2 +-
arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
arch/arm/boot/dts/at91sam9260ek.dts | 2 +-
arch/arm/boot/dts/at91sam9261.dtsi | 2 +-
arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 2 +-
arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
arch/arm/boot/dts/at91sam9rl.dtsi | 2 +-
arch/arm/boot/dts/at91sam9x5.dtsi | 2 +-
arch/arm/boot/dts/sam9x60.dtsi | 2 +-
arch/arm/boot/dts/sama5d2.dtsi | 2 +-
arch/arm/boot/dts/sama5d3.dtsi | 2 +-
arch/arm/boot/dts/sama5d4.dtsi | 2 +-
arch/arm/boot/dts/sama7g5.dtsi | 2 +-
arch/arm/boot/dts/usb_a9260.dts | 2 +-
arch/arm/boot/dts/usb_a9263.dts | 2 +-
20 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm/boot/dts/at91-qil_a9260.dts b/arch/arm/boot/dts/at91-qil_a9260.dts
index 9d26f9996348..5ccb3c139592 100644
--- a/arch/arm/boot/dts/at91-qil_a9260.dts
+++ b/arch/arm/boot/dts/at91-qil_a9260.dts
@@ -108,7 +108,7 @@ dbgu: serial@fffff200 {
status = "okay";
};
- shdwc@fffffd10 {
+ shdwc: poweroff@fffffd10 {
atmel,wakeup-counter = <10>;
atmel,wakeup-rtt-timer;
};
diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
index 0dc6ca377b0c..cb6243cfe182 100644
--- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
@@ -139,7 +139,7 @@ i2c3: i2c@600 {
};
};
- shdwc@f8048010 {
+ poweroff@f8048010 {
debounce-delay-us = <976>;
atmel,wakeup-rtc-timer;
diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
index 76a711b167b0..86b860d80726 100644
--- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
@@ -204,7 +204,7 @@ i2c2: i2c@600 {
};
};
- shdwc@f8048010 {
+ poweroff@f8048010 {
debounce-delay-us = <976>;
input@0 {
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index 85949c24b687..024a553842a9 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -348,7 +348,7 @@ i2c2: i2c@600 {
};
};
- shdwc@f8048010 {
+ poweroff@f8048010 {
debounce-delay-us = <976>;
atmel,wakeup-rtc-timer;
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 16e3b24b4ddd..35a007365b6a 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -130,7 +130,7 @@ reset-controller@fffffd00 {
clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
};
- shdwc@fffffd10 {
+ shdwc: poweroff@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
diff --git a/arch/arm/boot/dts/at91sam9260ek.dts b/arch/arm/boot/dts/at91sam9260ek.dts
index bb72f050a4fe..720c15472c4a 100644
--- a/arch/arm/boot/dts/at91sam9260ek.dts
+++ b/arch/arm/boot/dts/at91sam9260ek.dts
@@ -112,7 +112,7 @@ pinctrl_board_mmc0_slot1: mmc0_slot1-board {
};
};
- shdwc@fffffd10 {
+ shdwc: poweroff@fffffd10 {
atmel,wakeup-counter = <10>;
atmel,wakeup-rtt-timer;
};
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index fe9ead867e2a..528ffc6f6f96 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -614,7 +614,7 @@ reset-controller@fffffd00 {
clocks = <&slow_xtal>;
};
- shdwc@fffffd10 {
+ poweroff@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
clocks = <&slow_xtal>;
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index ee5e6ed44dd4..75d8ff2d12c8 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -158,7 +158,7 @@ reset-controller@fffffd00 {
clocks = <&slow_xtal>;
};
- shdwc@fffffd10 {
+ poweroff@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
clocks = <&slow_xtal>;
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index 024af2db638e..565b99e79c52 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -126,7 +126,7 @@ flash@1 {
};
};
- shdwc@fffffd10 {
+ shdwc: poweroff@fffffd10 {
atmel,wakeup-counter = <10>;
atmel,wakeup-rtt-timer;
};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 498cb92b29f9..7cccc606e36c 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -152,7 +152,7 @@ pit: timer@fffffd30 {
};
- shdwc@fffffd10 {
+ poweroff@fffffd10 {
compatible = "atmel,at91sam9rl-shdwc";
reg = <0xfffffd10 0x10>;
clocks = <&clk32k>;
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 0e28101b26bf..8dc04e9031a6 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -140,7 +140,7 @@ pit: timer@fffffe30 {
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
};
- shdwc@fffffe10 {
+ poweroff@fffffe10 {
compatible = "atmel,at91sam9x5-shdwc";
reg = <0xfffffe10 0x10>;
clocks = <&clk32k>;
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index d7e8a115c916..3d089ffbe162 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -778,7 +778,7 @@ reset-controller@fffffd00 {
clocks = <&clk32k>;
};
- shdwc@fffffd10 {
+ poweroff@fffffd10 {
compatible = "atmel,at91sam9260-shdwc";
reg = <0xfffffd10 0x10>;
clocks = <&clk32k>;
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 0123ee47151c..a1fed912f2ee 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -141,7 +141,7 @@ reset_controller: reset-controller@fffffe00 {
clocks = <&clk32k>;
};
- shutdown_controller: shdwc@fffffe10 {
+ shutdown_controller: poweroff@fffffe10 {
compatible = "atmel,at91sam9x5-shdwc";
reg = <0xfffffe10 0x10>;
clocks = <&clk32k>;
diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
index 933d73505a8b..47c4f267a45c 100644
--- a/arch/arm/boot/dts/sam9x60.dtsi
+++ b/arch/arm/boot/dts/sam9x60.dtsi
@@ -675,7 +675,7 @@ reset_controller: reset-controller@fffffe00 {
clocks = <&clk32k 0>;
};
- shutdown_controller: shdwc@fffffe10 {
+ shutdown_controller: poweroff@fffffe10 {
compatible = "microchip,sam9x60-shdwc";
reg = <0xfffffe10 0x10>;
clocks = <&clk32k 0>;
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 7b6471655dee..daeeb24e5f4d 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -680,7 +680,7 @@ reset_controller: reset-controller@f8048000 {
clocks = <&clk32k>;
};
- shutdown_controller: shdwc@f8048010 {
+ shutdown_controller: poweroff@f8048010 {
compatible = "atmel,sama5d2-shdwc";
reg = <0xf8048010 0x10>;
clocks = <&clk32k>;
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 0eebf6c760b3..d9e66700d1c2 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -1016,7 +1016,7 @@ reset_controller: reset-controller@fffffe00 {
clocks = <&clk32k>;
};
- shutdown_controller: shutdown-controller@fffffe10 {
+ shutdown_controller: poweroff@fffffe10 {
compatible = "atmel,at91sam9x5-shdwc";
reg = <0xfffffe10 0x10>;
clocks = <&clk32k>;
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index de6c82969232..41284e013f53 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -740,7 +740,7 @@ reset_controller: reset-controller@fc068600 {
clocks = <&clk32k>;
};
- shutdown_controller: shdwc@fc068610 {
+ shutdown_controller: poweroff@fc068610 {
compatible = "atmel,at91sam9x5-shdwc";
reg = <0xfc068610 0x10>;
clocks = <&clk32k>;
diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index f0478a43edc2..886b6209a71e 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -257,7 +257,7 @@ reset_controller: reset-controller@e001d000 {
clocks = <&clk32k 0>;
};
- shdwc: shdwc@e001d010 {
+ shdwc: poweroff@e001d010 {
compatible = "microchip,sama7g5-shdwc", "syscon";
reg = <0xe001d010 0x10>;
clocks = <&clk32k 0>;
diff --git a/arch/arm/boot/dts/usb_a9260.dts b/arch/arm/boot/dts/usb_a9260.dts
index 6cfa83921ac2..66f8da89007d 100644
--- a/arch/arm/boot/dts/usb_a9260.dts
+++ b/arch/arm/boot/dts/usb_a9260.dts
@@ -22,7 +22,7 @@ memory@20000000 {
ahb {
apb {
- shdwc@fffffd10 {
+ shdwc: poweroff@fffffd10 {
atmel,wakeup-counter = <10>;
atmel,wakeup-rtt-timer;
};
diff --git a/arch/arm/boot/dts/usb_a9263.dts b/arch/arm/boot/dts/usb_a9263.dts
index b6cb9cdf8197..45745915b2e1 100644
--- a/arch/arm/boot/dts/usb_a9263.dts
+++ b/arch/arm/boot/dts/usb_a9263.dts
@@ -67,7 +67,7 @@ flash@0 {
};
};
- shdwc@fffffd10 {
+ poweroff@fffffd10 {
atmel,wakeup-counter = <10>;
atmel,wakeup-rtt-timer;
};
--
2.34.1
Convert Atmel shutdown controller to YAML.
Signed-off-by: Claudiu Beznea <[email protected]>
---
.../devicetree/bindings/arm/atmel-sysregs.txt | 31 -------
.../power/reset/atmel,at91sam9260-shdwc.yaml | 82 +++++++++++++++++++
2 files changed, 82 insertions(+), 31 deletions(-)
create mode 100644 Documentation/devicetree/bindings/power/reset/atmel,at91sam9260-shdwc.yaml
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index ab1b352344ae..e6b2fb291b45 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -52,37 +52,6 @@ Example:
reg = <0xe3804000 0x1000>;
};
-SHDWC Shutdown Controller
-
-required properties:
-- compatible: Should be "atmel,<chip>-shdwc".
- <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
-- reg: Should contain registers location and length
-- clocks: phandle to input clock.
-
-optional properties:
-- atmel,wakeup-mode: String, operation mode of the wakeup mode.
- Supported values are: "none", "high", "low", "any".
-- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
-
-optional at91sam9260 properties:
-- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
-
-optional at91sam9rl properties:
-- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
-- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
-
-optional at91sam9x5 properties:
-- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
-
-Example:
-
- shdwc@fffffd10 {
- compatible = "atmel,at91sam9260-shdwc";
- reg = <0xfffffd10 0x10>;
- clocks = <&clk32k>;
- };
-
SHDWC SAMA5D2-Compatible Shutdown Controller
1) shdwc node
diff --git a/Documentation/devicetree/bindings/power/reset/atmel,at91sam9260-shdwc.yaml b/Documentation/devicetree/bindings/power/reset/atmel,at91sam9260-shdwc.yaml
new file mode 100644
index 000000000000..af7b76fe9648
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/reset/atmel,at91sam9260-shdwc.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/reset/atmel,at91sam9260-shdwc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel SHDWC Shutdown Controller
+
+maintainers:
+ - Claudiu Beznea <[email protected]>
+
+description:
+ Atmel SHDWC shutdown controller controls the power supplies VDDIO and VDDCORE
+ and the wake-up detection on debounced input lines.
+
+properties:
+ compatible:
+ enum:
+ - atmel,at91sam9260-shdwc
+ - atmel,at91sam9rl-shdwc
+ - atmel,at91sam9x5-shdwc
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ atmel,wakeup-mode:
+ description: operation mode of the wakeup mode
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [ none, high, low, any ]
+
+ atmel,wakeup-counter:
+ description: counter on wake-up 0
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 15
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - atmel,at91sam9260-shdwc
+ - atmel,at91sam9rl-shdwc
+ then:
+ properties:
+ atmel,wakeup-rtt-timer:
+ description: enable real-time timer wake-up
+ type: boolean
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - atmel,at91sam9rl-shdwc
+ - atmel,at91sam9x5-shdwc
+ then:
+ properties:
+ atmel,wakeup-rtc-timer:
+ description: enable real-time clock wake-up
+ type: boolean
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ shdwc: poweroff@fffffd10 {
+ compatible = "atmel,at91sam9260-shdwc";
+ reg = <0xfffffd10 0x10>;
+ clocks = <&clk32k>;
+ };
+
+...
--
2.34.1
Add documentation file for SAMA5D2 shutdown controller.
Signed-off-by: Claudiu Beznea <[email protected]>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 74a6b6b13d84..cdf4b41cf62b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13811,6 +13811,7 @@ F: include/dt-bindings/iio/adc/at91-sama5d2_adc.h
MICROCHIP SAMA5D2-COMPATIBLE SHUTDOWN CONTROLLER
M: Claudiu Beznea <[email protected]>
S: Supported
+F: Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
F: drivers/power/reset/at91-sama5d2_shdwc.c
MICROCHIP SPI DRIVER
--
2.34.1
On 24/05/2023 at 14:35, Claudiu Beznea wrote:
> Hi,
>
> Series convert AT91 shutdown controllers documentation to YAML.
> Along with it device trees were updated and also entries to
> MAINTAINERS with documentation files.
>
> Thank you,
> Claudiu
>
> Changes in v2:
> - use minimum, maximum on uint32 enums instead of all possible values
> - change commit description for patch 3/4 to explain why there is a
> syscon along with microchip,sama7g5-shdwc
> - remove | near description entries
>
> Claudiu Beznea (4):
> ARM: dts: at91: use generic name for shutdown controller
> dt-bindings: power: reset: atmel,at91sam9260-shdwc: convert to yaml
> dt-bindings: power: reset: atmel,sama5d2-shdwc: convert to yaml
> MAINTAINERS: add documentation file for Microchip SAMA5D2 shutdown
> controller
For the whole series:
Acked-by: Nicolas Ferre <[email protected]>
Best regards,
Nicolas
>
> .../devicetree/bindings/arm/atmel-sysregs.txt | 94 --------------
> .../power/reset/atmel,at91sam9260-shdwc.yaml | 82 +++++++++++++
> .../power/reset/atmel,sama5d2-shdwc.yaml | 115 ++++++++++++++++++
> MAINTAINERS | 1 +
> arch/arm/boot/dts/at91-qil_a9260.dts | 2 +-
> arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 2 +-
> arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 2 +-
> arch/arm/boot/dts/at91-sama5d2_xplained.dts | 2 +-
> arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9260ek.dts | 2 +-
> arch/arm/boot/dts/at91sam9261.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9rl.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9x5.dtsi | 2 +-
> arch/arm/boot/dts/sam9x60.dtsi | 2 +-
> arch/arm/boot/dts/sama5d2.dtsi | 2 +-
> arch/arm/boot/dts/sama5d3.dtsi | 2 +-
> arch/arm/boot/dts/sama5d4.dtsi | 2 +-
> arch/arm/boot/dts/sama7g5.dtsi | 2 +-
> arch/arm/boot/dts/usb_a9260.dts | 2 +-
> arch/arm/boot/dts/usb_a9263.dts | 2 +-
> 24 files changed, 218 insertions(+), 114 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/power/reset/atmel,at91sam9260-shdwc.yaml
> create mode 100644 Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
>
--
Nicolas Ferre
On Wed, May 24, 2023 at 03:35:27PM +0300, Claudiu Beznea wrote:
> Convert Atmel SAMA5D2 shutdown controller to YAML. SAMA7G5 SHDWC DT node
> (available in arch/arm/boot/dts/sama7g5.dtsi) has syscon along with its
> compatible. There is no usage of this syscon in the current code but it
> may be necessary in future as some registers of SHDWC are accessed in
> different drivers (at91-sama5d2_shdwc.c and arch/arm/mach-at91/pm.c).
> Thus update the YAML with it to make DT checkers happy.
>
> Signed-off-by: Claudiu Beznea <[email protected]>
Modulo the license thing that I mentioned on v1,
Reviewed-by: Conor Dooley <[email protected]>
Thanks,
Conor.
> ---
> .../devicetree/bindings/arm/atmel-sysregs.txt | 63 ----------
> .../power/reset/atmel,sama5d2-shdwc.yaml | 115 ++++++++++++++++++
> 2 files changed, 115 insertions(+), 63 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> index e6b2fb291b45..67a66bf74895 100644
> --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
> @@ -52,69 +52,6 @@ Example:
> reg = <0xe3804000 0x1000>;
> };
>
> -SHDWC SAMA5D2-Compatible Shutdown Controller
> -
> -1) shdwc node
> -
> -required properties:
> -- compatible: should be "atmel,sama5d2-shdwc", "microchip,sam9x60-shdwc" or
> - "microchip,sama7g5-shdwc"
> -- reg: should contain registers location and length
> -- clocks: phandle to input clock.
> -- #address-cells: should be one. The cell is the wake-up input index.
> -- #size-cells: should be zero.
> -
> -optional properties:
> -
> -- debounce-delay-us: minimum wake-up inputs debouncer period in
> - microseconds. It's usually a board-related property.
> -- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
> -
> -optional microchip,sam9x60-shdwc or microchip,sama7g5-shdwc properties:
> -- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
> -
> -The node contains child nodes for each wake-up input that the platform uses.
> -
> -2) input nodes
> -
> -Wake-up input nodes are usually described in the "board" part of the Device
> -Tree. Note also that input 0 is linked to the wake-up pin and is frequently
> -used.
> -
> -Required properties:
> -- reg: should contain the wake-up input index [0 - 15].
> -
> -Optional properties:
> -- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
> - by the child, forces the wake-up of the core power supply on a high level.
> - The default is to be active low.
> -
> -Example:
> -
> -On the SoC side:
> - shdwc@f8048010 {
> - compatible = "atmel,sama5d2-shdwc";
> - reg = <0xf8048010 0x10>;
> - clocks = <&clk32k>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - atmel,wakeup-rtc-timer;
> - };
> -
> -On the board side:
> - shdwc@f8048010 {
> - debounce-delay-us = <976>;
> -
> - input@0 {
> - reg = <0>;
> - };
> -
> - input@1 {
> - reg = <1>;
> - atmel,wakeup-active-high;
> - };
> - };
> -
> Special Function Registers (SFR)
>
> Special Function Registers (SFR) manage specific aspects of the integrated
> diff --git a/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
> new file mode 100644
> index 000000000000..31a16a354a3a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
> @@ -0,0 +1,115 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/reset/atmel,sama5d2-shdwc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Atmel SAMA5D2 SHDWC Shutdown Controller
> +
> +maintainers:
> + - Claudiu Beznea <[email protected]>
> +
> +description:
> + Atmel SHDWC shutdown controller controls the power supplies VDDIO and VDDCORE
> + and the wake-up detection on debounced input lines.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - const: microchip,sama7g5-shdwc
> + - const: syscon
> + - items:
> + enum:
> + - atmel,sama5d2-shdwc
> + - microchip,sam9x60-shdwc
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + debounce-delay-us:
> + description:
> + Minimum wake-up inputs debouncer period in microseconds. It is usually a
> + board-related property.
> +
> + atmel,wakeup-rtc-timer:
> + description: enable real-time clock wake-up
> + type: boolean
> +
> +patternProperties:
> + "^input@[0-15]$":
> + description:
> + Wake-up input nodes. These are usually described in the "board" part of
> + the Device Tree. Note also that input 0 is linked to the wake-up pin and
> + is frequently used.
> + type: object
> + properties:
> + reg:
> + description: contains the wake-up input index
> + minimum: 0
> + maximum: 15
> +
> + atmel,wakeup-active-high:
> + description:
> + The corresponding wake-up input described by the child forces the
> + wake-up of the core power supply on a high level. The default is to
> + be active low.
> + type: boolean
> +
> + required:
> + - reg
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - microchip,sam9x60-shdwc
> + - microchip,sama7g5-shdwc
> + then:
> + properties:
> + atmel,wakeup-rtt-timer:
> + description: enable real-time timer wake-up
> + type: boolean
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + shdwc: poweroff@f8048010 {
> + compatible = "atmel,sama5d2-shdwc";
> + reg = <0xf8048010 0x10>;
> + clocks = <&clk32k>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + atmel,wakeup-rtc-timer;
> + debounce-delay-us = <976>;
> +
> + input@0 {
> + reg = <0>;
> + };
> +
> + input@1 {
> + reg = <1>;
> + atmel,wakeup-active-high;
> + };
> + };
> +
> +...
> --
> 2.34.1
>
On Wed, May 24, 2023 at 03:35:26PM +0300, Claudiu Beznea wrote:
> Convert Atmel shutdown controller to YAML.
>
Same here. Modulo thinking Rob should Ack it because I think this will
re-license the txt binding,
Reviewed-by: Conor Dooley <[email protected]>
Thanks,
Conor.
On 24/05/2023 14:35, Claudiu Beznea wrote:
> Convert Atmel shutdown controller to YAML.
>
> Signed-off-by: Claudiu Beznea <[email protected]>
> ---
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - atmel,at91sam9260-shdwc
> + - atmel,at91sam9rl-shdwc
> + then:
> + properties:
> + atmel,wakeup-rtt-timer:
> + description: enable real-time timer wake-up
> + type: boolean
No, don't define properties in allOf.
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - atmel,at91sam9rl-shdwc
> + - atmel,at91sam9x5-shdwc
> + then:
> + properties:
> + atmel,wakeup-rtc-timer:
> + description: enable real-time clock wake-up
> + type: boolean
Same problem.
> +
> +unevaluatedProperties: false
This should be additionalProperties: false.
> +
> +examples:
> + - |
> + shdwc: poweroff@fffffd10 {
> + compatible = "atmel,at91sam9260-shdwc";
> + reg = <0xfffffd10 0x10>;
> + clocks = <&clk32k>;
> + };
> +
> +...
Best regards,
Krzysztof
On 24/05/2023 14:35, Claudiu Beznea wrote:
> Convert Atmel SAMA5D2 shutdown controller to YAML. SAMA7G5 SHDWC DT node
> (available in arch/arm/boot/dts/sama7g5.dtsi) has syscon along with its
> compatible. There is no usage of this syscon in the current code but it
> may be necessary in future as some registers of SHDWC are accessed in
> different drivers (at91-sama5d2_shdwc.c and arch/arm/mach-at91/pm.c).
> Thus update the YAML with it to make DT checkers happy.
>
> +---
> +$id: http://devicetree.org/schemas/power/reset/atmel,sama5d2-shdwc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Atmel SAMA5D2 SHDWC Shutdown Controller
> +
> +maintainers:
> + - Claudiu Beznea <[email protected]>
> +
> +description:
> + Atmel SHDWC shutdown controller controls the power supplies VDDIO and VDDCORE
> + and the wake-up detection on debounced input lines.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - const: microchip,sama7g5-shdwc
> + - const: syscon
> + - items:
These are not items, but just enum. This could not work as intended.
> + enum:
> + - atmel,sama5d2-shdwc
> + - microchip,sam9x60-shdwc
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + debounce-delay-us:
> + description:
> + Minimum wake-up inputs debouncer period in microseconds. It is usually a
> + board-related property.
> +
> + atmel,wakeup-rtc-timer:
> + description: enable real-time clock wake-up
> + type: boolean
> +
> +patternProperties:
> + "^input@[0-15]$":
> + description:
> + Wake-up input nodes. These are usually described in the "board" part of
> + the Device Tree. Note also that input 0 is linked to the wake-up pin and
> + is frequently used.
> + type: object
> + properties:
> + reg:
> + description: contains the wake-up input index
> + minimum: 0
> + maximum: 15
> +
> + atmel,wakeup-active-high:
> + description:
> + The corresponding wake-up input described by the child forces the
> + wake-up of the core power supply on a high level. The default is to
> + be active low.
> + type: boolean
> +
> + required:
> + - reg
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - microchip,sam9x60-shdwc
> + - microchip,sama7g5-shdwc
> + then:
> + properties:
> + atmel,wakeup-rtt-timer:
> + description: enable real-time timer wake-up
> + type: boolean
Don't define properties in allOf. This should be in top-level.
Missing additionalProperties: false.
Best regards,
Krzysztof
On Wed, Jun 07, 2023 at 02:43:51PM -0600, Rob Herring wrote:
> On Wed, May 24, 2023 at 08:19:08PM +0100, Conor Dooley wrote:
> > On Wed, May 24, 2023 at 03:35:27PM +0300, Claudiu Beznea wrote:
> > > Convert Atmel SAMA5D2 shutdown controller to YAML. SAMA7G5 SHDWC DT node
> > > (available in arch/arm/boot/dts/sama7g5.dtsi) has syscon along with its
> > > compatible. There is no usage of this syscon in the current code but it
> > > may be necessary in future as some registers of SHDWC are accessed in
> > > different drivers (at91-sama5d2_shdwc.c and arch/arm/mach-at91/pm.c).
> > > Thus update the YAML with it to make DT checkers happy.
> > >
> > > Signed-off-by: Claudiu Beznea <[email protected]>
> >
> > Modulo the license thing that I mentioned on v1,
>
> Should be fine given it's an Microchip employee changing a Microchip
> binding.
Aye, that part I figured was fine - it was the when I looked at the
blame for the files & they were filled with your name that I wondered
about the licensing.
If you're okay with it though then clearly there's not an issue :)
Cheers,
Conor.
On Wed, May 24, 2023 at 08:19:08PM +0100, Conor Dooley wrote:
> On Wed, May 24, 2023 at 03:35:27PM +0300, Claudiu Beznea wrote:
> > Convert Atmel SAMA5D2 shutdown controller to YAML. SAMA7G5 SHDWC DT node
> > (available in arch/arm/boot/dts/sama7g5.dtsi) has syscon along with its
> > compatible. There is no usage of this syscon in the current code but it
> > may be necessary in future as some registers of SHDWC are accessed in
> > different drivers (at91-sama5d2_shdwc.c and arch/arm/mach-at91/pm.c).
> > Thus update the YAML with it to make DT checkers happy.
> >
> > Signed-off-by: Claudiu Beznea <[email protected]>
>
> Modulo the license thing that I mentioned on v1,
Should be fine given it's an Microchip employee changing a Microchip
binding.
Rob
On Wed, Jun 7, 2023 at 2:48 PM Conor Dooley <[email protected]> wrote:
>
> On Wed, Jun 07, 2023 at 02:43:51PM -0600, Rob Herring wrote:
> > On Wed, May 24, 2023 at 08:19:08PM +0100, Conor Dooley wrote:
> > > On Wed, May 24, 2023 at 03:35:27PM +0300, Claudiu Beznea wrote:
> > > > Convert Atmel SAMA5D2 shutdown controller to YAML. SAMA7G5 SHDWC DT node
> > > > (available in arch/arm/boot/dts/sama7g5.dtsi) has syscon along with its
> > > > compatible. There is no usage of this syscon in the current code but it
> > > > may be necessary in future as some registers of SHDWC are accessed in
> > > > different drivers (at91-sama5d2_shdwc.c and arch/arm/mach-at91/pm.c).
> > > > Thus update the YAML with it to make DT checkers happy.
> > > >
> > > > Signed-off-by: Claudiu Beznea <[email protected]>
> > >
> > > Modulo the license thing that I mentioned on v1,
> >
> > Should be fine given it's an Microchip employee changing a Microchip
> > binding.
>
> Aye, that part I figured was fine - it was the when I looked at the
> blame for the files & they were filled with your name that I wondered
> about the licensing.
For reference, anything done by Arm, Linaro or NVIDIA employees is
okay to relicense to dual license.
Rob
On Thu, Jun 08, 2023 at 08:38:10AM -0600, Rob Herring wrote:
> For reference, anything done by Arm, Linaro or NVIDIA employees is
> okay to relicense to dual license.
Ah cool, that's good to know, thanks.
Perhaps I should try to get a similar edict issued for Microchip ones.
@Nicolas, does that sound reasonable?
Cheers,
Conor.
On 08/06/2023 at 18:49, Conor Dooley wrote:
>
> On Thu, Jun 08, 2023 at 08:38:10AM -0600, Rob Herring wrote:
>
>> For reference, anything done by Arm, Linaro or NVIDIA employees is
>> okay to relicense to dual license.
> Ah cool, that's good to know, thanks.
> Perhaps I should try to get a similar edict issued for Microchip ones.
> @Nicolas, does that sound reasonable?
Well, we can work it out internally, indeed. But is there a public
statement about this somewhere?
Regards,
Nicolas
--
Nicolas Ferre
On Fri, Jun 09, 2023 at 12:09:24PM +0200, Nicolas Ferre wrote:
> On 08/06/2023 at 18:49, Conor Dooley wrote:
> >
> > On Thu, Jun 08, 2023 at 08:38:10AM -0600, Rob Herring wrote:
> >
> > > For reference, anything done by Arm, Linaro or NVIDIA employees is
> > > okay to relicense to dual license.
> > Ah cool, that's good to know, thanks.
> > Perhaps I should try to get a similar edict issued for Microchip ones.
> > @Nicolas, does that sound reasonable?
>
> Well, we can work it out internally, indeed. But is there a public statement
> about this somewhere?
You mean, is there a public statement about Arm/Linaro/Nvidia being okay
with relicensing bindings as dual license?
Hey Nicolas,
On Tue, Jun 13, 2023 at 07:44:58PM +0100, Conor Dooley wrote:
> On Fri, Jun 09, 2023 at 12:09:24PM +0200, Nicolas Ferre wrote:
> > On 08/06/2023 at 18:49, Conor Dooley wrote:
> > >
> > > On Thu, Jun 08, 2023 at 08:38:10AM -0600, Rob Herring wrote:
> > >
> > > > For reference, anything done by Arm, Linaro or NVIDIA employees is
> > > > okay to relicense to dual license.
> > > Ah cool, that's good to know, thanks.
> > > Perhaps I should try to get a similar edict issued for Microchip ones.
> > > @Nicolas, does that sound reasonable?
> >
> > Well, we can work it out internally, indeed. But is there a public statement
> > about this somewhere?
>
> You mean, is there a public statement about Arm/Linaro/Nvidia being okay
> with relicensing bindings as dual license?
This was sitting at the end of my queue, don't recall following this up
internally. Getting an edict might be more hassle than it is worth & I
guess I am always CCed on bindings to Ack them.