2023-05-26 03:07:42

by Adam Ford

[permalink] [raw]
Subject: [PATCH V8 3/7] drm: bridge: samsung-dsim: Fetch pll-clock-frequency automatically

Make the pll-clock-frequency optional. If it's present, use it
to maintain backwards compatibility with existing hardware. If it
is absent, read clock rate of "sclk_mipi" to determine the rate.
Since it can be optional, change the message from an error to
dev_info.

Signed-off-by: Adam Ford <[email protected]>
Tested-by: Chen-Yu Tsai <[email protected]>
Tested-by: Frieder Schrempf <[email protected]>
Reviewed-by: Frieder Schrempf <[email protected]>
Tested-by: Marek Szyprowski <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
Tested-by: Jagan Teki <[email protected]> # imx8mm-icore
---
drivers/gpu/drm/bridge/samsung-dsim.c | 22 +++++++++++++++-------
1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
index ead922c3ce9f..307f1c20cfb9 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1719,11 +1719,11 @@ static const struct mipi_dsi_host_ops samsung_dsim_ops = {
};

static int samsung_dsim_of_read_u32(const struct device_node *np,
- const char *propname, u32 *out_value)
+ const char *propname, u32 *out_value, bool optional)
{
int ret = of_property_read_u32(np, propname, out_value);

- if (ret < 0)
+ if (ret < 0 && !optional)
pr_err("%pOF: failed to get '%s' property\n", np, propname);

return ret;
@@ -1736,19 +1736,27 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi)
u32 lane_polarities[5] = { 0 };
struct device_node *endpoint;
int i, nr_lanes, ret;
+ struct clk *pll_clk;

ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency",
- &dsi->pll_clk_rate);
- if (ret < 0)
- return ret;
+ &dsi->pll_clk_rate, 1);
+ /* If it doesn't exist, read it from the clock instead of failing */
+ if (ret < 0) {
+ dev_dbg(dev, "Using sclk_mipi for pll clock frequency\n");
+ pll_clk = devm_clk_get(dev, "sclk_mipi");
+ if (!IS_ERR(pll_clk))
+ dsi->pll_clk_rate = clk_get_rate(pll_clk);
+ else
+ return PTR_ERR(pll_clk);
+ }

ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency",
- &dsi->burst_clk_rate);
+ &dsi->burst_clk_rate, 0);
if (ret < 0)
return ret;

ret = samsung_dsim_of_read_u32(node, "samsung,esc-clock-frequency",
- &dsi->esc_clk_rate);
+ &dsi->esc_clk_rate, 0);
if (ret < 0)
return ret;

--
2.39.2