Add SC7280 audioreach device tree nodes and extract audio specific
dtsi nodes and add them in new file.
This patch series depends on:
-- https://patchwork.kernel.org/project/linux-clk/list/?series=717985
Corresponding dt-bindings not mainlined yet.
-- https://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux.git/commit/?h=rproc-next&id=8490a99586abd480d7139893f78c019790a58979
Changes Since v5:
-- Re-arrange the patch list, driver changes should come after binding.
-- Remove incorrect dai cells property in "Add sound node for crd-rev3 board" patch.
-- Remove newlines in "Add LPASS PIL node" patch.
-- Update the commit message in "Update VA/RX/TX macro clock nodes" patch.
-- Update the commit message in "Update lpass_tlmm node" patch.
Changes Since v4:
-- Modify lpasscc clock controller node name.
-- Disable lpass_core node.
-- Modify Model name in sound node in "Add sound node for crd-rev3 board" patch.
-- Remove protection domain property in "Add LPASS PIL node".
Changes Since v3:
-- Remove deleting digital codecs in crd-rev3 board specific dtsi and upadate them using phandle.
-- Update commit message in "Update lpass_tlmm node" patch.
-- Change the position of status property in LPASS PIL node.
-- Update commit message in "Add sound node" patch.
Changes Since v2:
-- Remove Patch related to Add CGCR reset property.
-- Remove Patch related to Disable legacy path clock nodes.
-- Add dt-bindings for missing properties.
-- Change the order of nodes.
-- Move digictal codec macro nodes to root node from soc node.
-- Add adsp-pil-mode property in required clock nodes.
Changes Since v1:
-- Move remoteproc node to soc dtsi file.
-- Add qcom, adsp-pil-mode reg property in lpasscc node.
-- Fix typo errors.
-- Remove redundant status properties.
Srinivasa Rao Mandadapu (8):
arm64: dts: qcom: sc7280: Modify lpasscc node name
dt-bindings: remoteproc: qcom: sc7280-adsp-pil: Add missing properties
arm64: dts: qcom: sc7280: Extract audio nodes from common idp dtsi
file
arm64: dts: qcom: sc7280: Add sound node for crd-rev3 board
arm64: dts: qcom: sc7280: Add LPASS PIL node
arm64: dts: qcom: sc7280: Modify VA/RX/TX macro clock nodes for
audioreach solution
arm64: dts: qcom: sc7280: Modify LPASS_MCC reg region size in the
lpass_tlmm node
arm64: dts: qcom: sc7280: Add qcom,adsp-pil-mode property in clock
nodes
.../remoteproc/qcom,sc7280-adsp-pil.yaml | 30 ++-
.../arm64/boot/dts/qcom/sc7280-audio-idp.dtsi | 131 +++++++++
arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 1 +
.../sc7280-herobrine-audioreach-wcd9385.dtsi | 253 ++++++++++++++++++
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 122 ---------
arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 +-
6 files changed, 413 insertions(+), 128 deletions(-)
create mode 100644 arch/arm64/boot/dts/qcom/sc7280-audio-idp.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
--
2.25.1
From: Srinivasa Rao Mandadapu <[email protected]>
Add "qcom,adsp-pil-mode" property in clock nodes for herobrine
crd revision 3 board specific device tree.
This is to register clocks conditionally by differentiating ADSP
based platforms and legacy path platforms.
Also disable lpass_core clock, as it is creating conflict
with ADSP clocks and it is not required for ADSP based platforms.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Signed-off-by: Mohammad Rafi Shaik <[email protected]>
---
.../qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
index c02ca393378f..876a29178d46 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
@@ -197,6 +197,14 @@ q6prmcc: clock-controller {
};
};
+&lpass_aon {
+ qcom,adsp-pil-mode;
+};
+
+&lpass_core {
+ status = "disabled";
+};
+
&lpass_rx_macro {
/delete-property/ power-domains;
/delete-property/ power-domain-names;
@@ -239,3 +247,7 @@ &lpass_va_macro {
status = "okay";
};
+
+&lpasscc {
+ qcom,adsp-pil-mode;
+};
--
2.25.1
From: Srinivasa Rao Mandadapu <[email protected]>
Modify LPASS_MCC register region size in "lpass_tlmm" node.
The pincntl driver requires access until slew-rate register region
and remaining register region related to the lpass_efuse register
is not required in pincntl driver as lpass_efuse register region is
required in adsp remoteproc driver.
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Signed-off-by: Mohammad Rafi Shaik <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 270618521638..08afabbd0778 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2488,7 +2488,7 @@ lpass_ag_noc: interconnect@3c40000 {
lpass_tlmm: pinctrl@33c0000 {
compatible = "qcom,sc7280-lpass-lpi-pinctrl";
reg = <0 0x033c0000 0x0 0x20000>,
- <0 0x03550000 0x0 0x10000>;
+ <0 0x03550000 0x0 0xa100>;
qcom,adsp-bypass-mode;
gpio-controller;
#gpio-cells = <2>;
--
2.25.1