Document IPQ8074 compatible for Qcom NVMEM CPUFreq driver.
Signed-off-by: Robert Marko <[email protected]>
---
.../devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml
index 6f5e7904181f..7e1bb992ce90 100644
--- a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml
+++ b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml
@@ -28,6 +28,7 @@ select:
- qcom,apq8064
- qcom,apq8096
- qcom,ipq8064
+ - qcom,ipq8074
- qcom,msm8939
- qcom,msm8960
- qcom,msm8974
--
2.40.1
IPQ8074 comes in 2 families:
* IPQ8070A/IPQ8071A (Acorn) up to 1.4GHz
* IPQ8072A/IPQ8074A/IPQ8076A/IPQ8078A (Hawkeye) up to 2.2GHz
So, in order to be able to share one OPP table lets add support for IPQ8074
family based of SMEM SoC ID-s as speedbin fuse is always 0 on IPQ8074.
IPQ8074 compatible is blacklisted from DT platdev as the cpufreq device
will get created by NVMEM CPUFreq driver.
Signed-off-by: Robert Marko <[email protected]>
---
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
drivers/cpufreq/qcom-cpufreq-nvmem.c | 40 ++++++++++++++++++++++++++++
2 files changed, 41 insertions(+)
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index 14aa8281c7f4..e4d6d128647d 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -169,6 +169,7 @@ static const struct of_device_id blocklist[] __initconst = {
{ .compatible = "ti,am625", },
{ .compatible = "qcom,ipq8064", },
+ { .compatible = "qcom,ipq8074", },
{ .compatible = "qcom,apq8064", },
{ .compatible = "qcom,msm8974", },
{ .compatible = "qcom,msm8960", },
diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
index a88b6fe5db50..607fc0273e9c 100644
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
@@ -31,6 +31,9 @@
#include <dt-bindings/arm/qcom,ids.h>
+#define IPQ8074_HAWKEYE_VERSION BIT(0)
+#define IPQ8074_ACORN_VERSION BIT(1)
+
struct qcom_cpufreq_drv;
struct qcom_cpufreq_match_data {
@@ -204,6 +207,38 @@ static int qcom_cpufreq_krait_name_version(struct device *cpu_dev,
return ret;
}
+static int qcom_cpufreq_ipq8074_name_version(struct device *cpu_dev,
+ struct nvmem_cell *speedbin_nvmem,
+ char **pvs_name,
+ struct qcom_cpufreq_drv *drv)
+{
+ u32 msm_id;
+ int ret;
+ *pvs_name = NULL;
+
+ ret = qcom_smem_get_soc_id(&msm_id);
+ if (ret)
+ return ret;
+
+ switch (msm_id) {
+ case QCOM_ID_IPQ8070A:
+ case QCOM_ID_IPQ8071A:
+ drv->versions = IPQ8074_ACORN_VERSION;
+ break;
+ case QCOM_ID_IPQ8072A:
+ case QCOM_ID_IPQ8074A:
+ case QCOM_ID_IPQ8076A:
+ case QCOM_ID_IPQ8078A:
+ drv->versions = IPQ8074_HAWKEYE_VERSION;
+ break;
+ default:
+ BUG();
+ break;
+ }
+
+ return 0;
+}
+
static const struct qcom_cpufreq_match_data match_data_kryo = {
.get_version = qcom_cpufreq_kryo_name_version,
};
@@ -218,6 +253,10 @@ static const struct qcom_cpufreq_match_data match_data_qcs404 = {
.genpd_names = qcs404_genpd_names,
};
+static const struct qcom_cpufreq_match_data match_data_ipq8074 = {
+ .get_version = qcom_cpufreq_ipq8074_name_version,
+};
+
static int qcom_cpufreq_probe(struct platform_device *pdev)
{
struct qcom_cpufreq_drv *drv;
@@ -363,6 +402,7 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
{ .compatible = "qcom,msm8996", .data = &match_data_kryo },
{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
{ .compatible = "qcom,ipq8064", .data = &match_data_krait },
+ { .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 },
{ .compatible = "qcom,apq8064", .data = &match_data_krait },
{ .compatible = "qcom,msm8974", .data = &match_data_krait },
{ .compatible = "qcom,msm8960", .data = &match_data_krait },
--
2.40.1
On Sat, May 27, 2023 at 11:52:28AM +0200, Robert Marko wrote:
> Document IPQ8074 compatible for Qcom NVMEM CPUFreq driver.
>
> Signed-off-by: Robert Marko <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Thanks,
Conor.
On 27.05.2023 11:52, Robert Marko wrote:
> IPQ8074 comes in 2 families:
> * IPQ8070A/IPQ8071A (Acorn) up to 1.4GHz
> * IPQ8072A/IPQ8074A/IPQ8076A/IPQ8078A (Hawkeye) up to 2.2GHz
>
> So, in order to be able to share one OPP table lets add support for IPQ8074
> family based of SMEM SoC ID-s as speedbin fuse is always 0 on IPQ8074.
>
> IPQ8074 compatible is blacklisted from DT platdev as the cpufreq device
> will get created by NVMEM CPUFreq driver.
>
> Signed-off-by: Robert Marko <[email protected]>
> ---
> drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
> drivers/cpufreq/qcom-cpufreq-nvmem.c | 40 ++++++++++++++++++++++++++++
> 2 files changed, 41 insertions(+)
>
> diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
> index 14aa8281c7f4..e4d6d128647d 100644
> --- a/drivers/cpufreq/cpufreq-dt-platdev.c
> +++ b/drivers/cpufreq/cpufreq-dt-platdev.c
> @@ -169,6 +169,7 @@ static const struct of_device_id blocklist[] __initconst = {
> { .compatible = "ti,am625", },
>
> { .compatible = "qcom,ipq8064", },
> + { .compatible = "qcom,ipq8074", },
> { .compatible = "qcom,apq8064", },
> { .compatible = "qcom,msm8974", },
> { .compatible = "qcom,msm8960", },
> diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
> index a88b6fe5db50..607fc0273e9c 100644
> --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
> +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
> @@ -31,6 +31,9 @@
>
> #include <dt-bindings/arm/qcom,ids.h>
>
> +#define IPQ8074_HAWKEYE_VERSION BIT(0)
> +#define IPQ8074_ACORN_VERSION BIT(1)
> +
> struct qcom_cpufreq_drv;
>
> struct qcom_cpufreq_match_data {
> @@ -204,6 +207,38 @@ static int qcom_cpufreq_krait_name_version(struct device *cpu_dev,
> return ret;
> }
>
> +static int qcom_cpufreq_ipq8074_name_version(struct device *cpu_dev,
> + struct nvmem_cell *speedbin_nvmem,
> + char **pvs_name,
> + struct qcom_cpufreq_drv *drv)
> +{
> + u32 msm_id;
> + int ret;
> + *pvs_name = NULL;
> +
> + ret = qcom_smem_get_soc_id(&msm_id);
> + if (ret)
> + return ret;
> +
> + switch (msm_id) {
> + case QCOM_ID_IPQ8070A:
> + case QCOM_ID_IPQ8071A:
> + drv->versions = IPQ8074_ACORN_VERSION;
> + break;
> + case QCOM_ID_IPQ8072A:
> + case QCOM_ID_IPQ8074A:
> + case QCOM_ID_IPQ8076A:
> + case QCOM_ID_IPQ8078A:
> + drv->versions = IPQ8074_HAWKEYE_VERSION;
> + break;
> + default:
> + BUG();
I'd say pr_err, or at least WARN() + setting the slowest bin would be
more desirable here, cpufreq probes early so people without uart etc.
will be unlikely to find out why their kernel dies.
Konrad
> + break;
> + }
> +
> + return 0;
> +}
> +
> static const struct qcom_cpufreq_match_data match_data_kryo = {
> .get_version = qcom_cpufreq_kryo_name_version,
> };
> @@ -218,6 +253,10 @@ static const struct qcom_cpufreq_match_data match_data_qcs404 = {
> .genpd_names = qcs404_genpd_names,
> };
>
> +static const struct qcom_cpufreq_match_data match_data_ipq8074 = {
> + .get_version = qcom_cpufreq_ipq8074_name_version,
> +};
> +
> static int qcom_cpufreq_probe(struct platform_device *pdev)
> {
> struct qcom_cpufreq_drv *drv;
> @@ -363,6 +402,7 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
> { .compatible = "qcom,msm8996", .data = &match_data_kryo },
> { .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
> { .compatible = "qcom,ipq8064", .data = &match_data_krait },
> + { .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 },
> { .compatible = "qcom,apq8064", .data = &match_data_krait },
> { .compatible = "qcom,msm8974", .data = &match_data_krait },
> { .compatible = "qcom,msm8960", .data = &match_data_krait },
On 27-05-23, 11:30, Conor Dooley wrote:
> On Sat, May 27, 2023 at 11:52:28AM +0200, Robert Marko wrote:
> > Document IPQ8074 compatible for Qcom NVMEM CPUFreq driver.
> >
> > Signed-off-by: Robert Marko <[email protected]>
>
> Acked-by: Conor Dooley <[email protected]>
Applied. Thanks.
--
viresh